Jaap Hoekstra
Delft University of Technology
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Featured researches published by Jaap Hoekstra.
international conference on electronics circuits and systems | 2001
R. van de Haar; Roelof H. Klunder; Jaap Hoekstra
In this paper a SPICE model for a single electron tunnel junction is given. The model is derived from a new formulation of the tunnel condition based on voltages over the tunnel junctions. To validate the model an electron box is simulated.
International Journal of Circuit Theory and Applications | 2000
Ahm Arthur van Roermund; Jaap Hoekstra
This paper describes an overall policy for the design of nanoelectronic systems, showing how specific properties of quantum devices can be exploited instead of being counteracted, by introducing unconventional design approaches. Single-electron tunnelling (SET) circuit ideas, as components for neural networks, are described in more detail. It is argued that the orthodox theory of single-electron devices is not appropriate for circuit design and simulation, and needs reconsideration. An overview of SET circuit designs for neural nodes is given.
International Journal of Circuit Theory and Applications | 2007
Jaap Hoekstra
SUMMARY A circuit theory for metallic single-electron tunnelling (SET) junctions is presented. In detail circuits with a single SET junction in arbitrary environments are described. Based on the conservation of energy in the circuits—a fundamental circuit theorem—equivalent circuit elements are proposed and possible physical justifications are presented. The resulting model represents the tunnel event by an impulse current source, the junction by a charged capacitor, and the tunnelling condition as a discrete process based on local circuit parameters—and may include a tunnelling time. Simple examples illustrate Coulomb blockade, Coulomb oscillations, and continuous direct tunnelling. Copyright q 2007 John Wiley & Sons, Ltd.
international conference on electronics circuits and systems | 2001
Roelof H. Klunder; Jaap Hoekstra
This paper shows how the, single electron tunneling (SET), electron box can be used as a programmable logic subcircuit. The digital functions NAND, NOR, and inverter made with this subcircuit are described. Simulation results are given to validate the correct working.
International Journal of Circuit Theory and Applications | 2004
Jaap Hoekstra
SUMMARY In this paper, the impulse circuit model for the single-electron tunnelling (SET) junction is discussed. Starting from well-known results of the so-called orthodox theory of single electronics, an equivalent circuit for the single-electron tunnelling junction is ‘derived’ by examining the behaviour of simple circuits including a SET junction. In the impulse circuit model, the electron tunnelling event is basically implemented by an impulsive current source with value e� (t − t0), which absorbs exactly the energy delivered by the sources that is not stored in the circuit. The equivalent circuit consisting of a charged capacitor in parallel with the impulsive current source does not contain a tunnel resistance, and the critical voltage is expressed in only local parameters. The impulse model is suitable for implementation in a circuit simulator; results of a SPICE simulation of the single-electron pump are shown. Copyright ? 2004 John Wiley & Sons, Ltd.
Analog Integrated Circuits and Signal Processing | 2000
José Camargo da Costa; Jaap Hoekstra; Martijn J. Goossens; C.J.M. Verhoeven; Arthur H. M. van Roermund
According to recent studies, the basic technologies presently adopted by the semiconductor industry for memory and processor fabrication should attain limits imposed by the laws of physics around the year 2010. Nanoscale sized devices like single-electron transistors appear as a highly promising option to replace conventional devices by that time. In this study, considerations about the realization of a GSI processor, based upon nanoelectronic devices, are presented.
Microprocessors and Microsystems | 1994
Jan N. H. Heemskerk; Jaap Hoekstra; Jacob M. J. Murre; Leon H. J. G. Kemna; Patrick Hudson
Abstract This paper discusses the main architectural issues, the implementation, and the performance of a parallel neurocomputer, the Brain-Style Processor or BSP400. This project presents a feasibility study for larger parallel neurocomputers. The design principles are hardware modularity, simple processors, and in situ (local) learning. The modular approach of the design ensures extensibility of the present version. The BSP400 consists of 25 modules (boards) each containing 16 simple 8-bit single-chip computers. The module boards are connected to a dedicated connection network. The architectural configuration of the BSP400 supports local activation and learning rules. The ability to communicate activations with the outside world in real-time makes the BSP400 particularly suited for real-world applications. The present version implements a modular type of neural network, the CALM (categorizing and learning module) neural network. In this implementation of CALM, activations are transmitted as single bits, but an internal representation of one byte is kept for both activations and weights. The system has a capacity of 400 processing elements and 32 000 connections. Even with slow and simple processing elements, it still achieves a speed of 6.4 million connections per second for a non-learning CALM network. Some small network simulation studies carried out on the BSP400 are reported. A comparison with a design study (Mark III and Mark IV) is made.
international conference on evolvable systems | 2003
Rudie van de Haar; Jaap Hoekstra
A McCulloch and Pitts neuron implemented in nanotechnology is simulated. The neuron is created with SET circuits operating in the single-electron current regime. Therefore the extremely low power properties of the SET devices are fully exploited. This neuron is simulated with a SPICE description model for a single SET junction.
IEEE Transactions on Circuits and Systems | 2007
Jaap Hoekstra
In this paper, various approaches to modeling tunneling and Coulomb blockade in circuits that include metallic single-electron tunneling devices are reviewed, and tested for their usefulness for designing nanoelectronic circuits. The approaches differ in the way they incorporate the quantization of charge into a circuit theory. First, the quantum phenomena important for single-electron tunneling devices are presented. Second, two energy-based theories are discussed, together often called orthodox theory of single electronics. The focus is on the transition from a device description to a circuit theory. In the orthodox theory the quantization of charge leads to the quantization of the continuous spectrum of energy states associated with the capacitance of small metal islands. In the third section, the on direct-tunneling-based impulse circuit model is discussed that translates the quantization of charge into the quantization of current and of time during a tunnel event. The conclusion is that the orthodox theory of single electronics poses severe problems when used as a circuit theory; the impulse circuit model provides a better starting point.
international symposium on circuits and systems | 2002
R. van de Haar; Jaap Hoekstra; Roelof H. Klunder
With single-electron tunneling (SET) technology it is possible to build electronic circuits with extreme low power properties. These SET circuits must therefore operate in the single electronics (current) regime. To simulate SET circuits in this regime, a SPICE model has been written. In contrast to the prescriptions in the so-called orthodox theory of single-electronics, the SPICE model explores the discrete character of the tunnel current and the tunnel condition. In this paper, a brief description of this SPICE model is given. Several known SET circuits are simulated using this SPICE model and are verified with a well known SET device simulator called SIMON, which is based on the orthodox theory of single-electronics.