Jack Liu

A 4GHz clock distribution architecture using subharmonically injection-locked coupled oscillators with clock skew calibration in 16nm CMOS

We propose a new approach to an on-chip clock distribution scheme. It is based on distributed multi-GHz LC-tank oscillators generating local clocks. The oscillators are mutually coupled to align their frequencies and are further subharmonically injection-locked to a much lower frequency reference to align their phases. The final phase calibration is via adjusting their self-resonant frequencies. We demonstrate the scheme with two 4GHz digitally controlled oscillators (DCO) separated by 650um on a 16nm CMOS die, mutually coupled via a differential transmission line and injection-locked to a 125MHz reference. The proposed architecture achieves a sub-ps calibrated skew with 87fs rms jitter while consuming 4.3mW, resulting in −258dB clock FOM (jitter2 × power).