Jack Ou

A g m /I D -Based Noise Optimization for CMOS Folded-Cascode Operational Amplifier.

Noise optimization is a challenging problem for nanoscale metal-oxide-silicon field-effect transistor circuits. This brief presents a technique that uses transconductance-to-drain current (gm/ID)-dependent transistor-noise parameters to explore the design space and to evaluate tradeoff decisions. An expression for the corner frequency of the folded-cascode amplifier is derived. The design process demonstrated in this brief using the folded-cascode amplifier is applicable to a wide class of amplifier circuits.

A Unified Explanation of gm/ID-Based Noise Analysis

We present an unified explanation of the transconductance-to-drain current (gm/ID)-based noise analysis in this paper. We show that both thermal noise coefficient (γ) and device noise corner frequency (fco) are dependent on the gm/ID of a transistor. We derive expressions to demonstrate the relationship between the normalized noise power spectral density technique and the technique based on γ and fco. We conclude this letter with examples to demonstrate the practical implication of our study. Our results show that while both techniques discussed in this letter can be used to compute noise numerically, using γ and fco to separate thermal noise from flicker noise provides additional insight for optimizing noise.

Design considerations of a CMOS envelope detector for low power wireless receiver applications

Previous studies have shown that a transistors transconductance-to-drain-current ratio is useful for optimizing analog circuits. In this paper, we derive an expression that captures the second order distortion generated at the output of an envelope detector. We use the derived expression, along with the nonlinear Taylor series coefficients to design a 3 µA envelope detector in 0.13 µm CMOS process.

Practical application of transconductance-to-drain-current dependent flicker noise analysis

Previous studies have shown that the transconductance-to-drain-current ratio (gm/ID) based technique is useful for noise analysis and optimization of analog CMOS circuits. In this paper, we examine flicker noise closely and show that even though its slope (A) does not depend gm/ID parameters of a transistor, knowledge of gm/Id parameters is required in order to determine its slope accurately. We take a look at several complications that arise in practice, and propose a rule that simplifies the process of de-embedding the slope of flicker noise. Finally, we apply the results in the design and analysis of a micropower operational transconductance amplifier (OTA) and show that excellent agreement between simulation and analysis is achieved.

Automated System-Level Design for Reliability: RF Front-End Application

Reliability is an important issue for circuits in critical applications such as military, aerospace, energy, and biomedical engineering. With the rise in the failure rate in nanometer CMOS, reliability has become critical in recent years. Existing design methodologies consider classical criteria such as area, speed, and power consumption. They are often implemented using postsynthesis reliability analysis and simulation tools. This chapter proposes an automated system design for reliability methodology. While accounting for a circuit’s reliability in the early design stages, the proposed methodology is capable of identifying an RF front-end optimal design considering reliability as a criterion.

Determination of transconductance-to-drain-current dependent flicker noise parameters

Previous studies have shown that the transconductance-to-drain-current ratio (gm/ID) based technique is useful for noise analysis and optimization of analog CMOS circuits. In this paper, we examine flicker noise closely and show that even though its slope (A) does not depend gm/ID parameters of a transistor, knowledge of gm/ID parameters is required in order to determine its slope accurately. We take a look at several scenarios that arise in practice, and generate a simple rule of thumb that simplifies the process of de-embedding the slope of flicker noise. Finally, we apply the results in the analysis of a micropower operational transconductance amplifier (OTA) and show that excellent agreement between simulation and analysis is achieved.