Jaesik Lee

Spatial light modulator for maskless optical projection lithography

Spatial light modulators (SLMs) designed to replace photomasks for optical lithography have been designed, fabricated, and tested. These microelectromechanical devices are fabricated with alternating polycrystalline Si and sacrificial SiO2 layers that are patterned by a 193nm wavelength scanner to dimensions as small as 150nm. Aerial image simulations were used to define the mechanical requirements of the devices. Piston motion of electrically actuated devices was measured with an optical profilometer. The measurements were fit to a simple equation to within 1nm precision, which is adequate for defining 50nm features lithographically. Transient response measurements show that one version of the SLM responds to actuation as quickly as 20μs, fast enough for current 193nm wavelength excimer laser sources.

A 14-b 150 MS/s CMOS DAC with Digital Background Calibration

A 14-b 150MS/s current-steering DAC with background calibration technique is demonstrated. Digital background calibration loop trims the static performance less than plusmn 0.55 LSB. The DAC achieves the spurious free dynamic range (SFDR) of 81dB at 1.6MHz and 67dB at 48.75MHz for sampling rate of 150MS/s. The DAC is implemented in a 0.35 mum CMOS process and active area is a 2.4times1.2 mm2

A 24GS/s 5-b ADC with closed-loop THA in 0.18μm SiGe BiCMOS

A 5-b flash ADC with a closed-loop THA is implemented in 0.18-mum SiGe BiCMOS. A global shunt feedback THA and a current-weighted comparator allow the ADC to achieve wide resolution bandwidth of 6.5 GHz and high sampling rate up to 24 GS/s. The ADC shows an SNDR of 28 dB and an SFDR of 36 dB with a 1 GHz input sampled at 16 GS/s. It consumes 3.3 W from 3.6/3-V supplies and occupies 8.68 mm2 silicon area.

High-Speed Analog-to-Digital Converters in SiGe Technologies

SiGe-based high-speed ADCs are promising for emerging higher frequency band applications such as coherent optical systems or millimeter-wave radios because of the inherent advantages of high-speed, high integration, and high yield technology. This paper addresses recent developments in high-speed ADCs in SiGe technology. An approach is then presented for development of ultra-high-speed ADCs for the next-generation wired or wireless communication systems.

A 50GS/s Distributed T/H Amplifier in 0.18μm SiGe BiCMOS

A 3-stage distributed T/H amplifier (DTHA) is presented for high-bit-rate optical receivers and millimeter-wave radios. Distributed topology enhances the bandwidth of the DTHA to >42GHz in track mode. The DTHA achieves 2-tone SFDR of 46dB with 15GHz input signal. The 1.47mm2 chip designed in a 0.18μm SiGe BiCMOS process dissipates 640mW.

A 50-GS/s 5-b ADC in 0.18-µm SiGe BiCMOS

A 5-b 50-GS/s time-interleaved ADC is presented in 0.18-µm SiGe BiCMOS. The two-channel interleaved flash architecture is used to increase the conversion rate. The front-end three-stage distributed track-and-hold amplifier is devised to improve the dynamic performance. The ADC features SNDR as high as 23.1 dB with 20 GHz sine wave input at 50 GS/s conversion rate, and the third harmonic distortion is −36.5 dBc. It shows the measured resolution bandwidth of 18 GHz and the FOM of 9 pJ per conversion step with power consumption of 5.4 W.

CMOS-Based MEMS Mirror Driver for Maskless Lithography Systems

This paper presents a low-power MEMS mirror driver for maskless lithography systems. The CMOS driver consists of a 512 x 128 analog memory cell array to drive the position of 512 x 128 MEMS mirror array. The row driver employs an analog de-multiplexing architecture, which eliminates the need for precise matching among multiple row driver characteristics. It uses two parallel high-speed 8-b DACs with 128 sample-and-hold amplifiers (SHAs) to write a multilevel data into memory cells. To verify its functionality, a prototype test chip is implemented with a self-calibration technique to compensate the cell leakage. The driver chip is implemented in a 0.35-mum digital CMOS process. It consumes a 120 mA power with 3/3.6 V supplies.

An InP-based OEIC for optical arbitrary waveform generation

We demonstrate a 4-bit 12.5 GSample/s optical arbitrary waveform generator (OAWG) based on an InP photonic integrated circuit and a low phase-noise mode-locked laser. A single-tone spurious-free dynamic range (SFDR) of 32 dB was obtained.

Recent Advances in III-V Electronics

Compound III-V semiconductor circuits promise fast and power efficient analog, digital and mixed-mode applications. This paper provides an overview of recent advances in high speed III-V compound devices and integrated circuits for high capacity wireless and optic fiber communications. Several critical compound semiconductor ASIC technologies and their unique performance advantages over prevailing silicon CMOS and SiGe technologies will be illustrated