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Dive into the research topics where Yves Baeyens is active.

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Featured researches published by Yves Baeyens.


IEEE Journal of Solid-state Circuits | 2004

A 5-b 10-GSample/s a/D converter for 10-gb/s optical receivers

Jaesik Lee; P. Roux; Ut-Va Koc; Thomas Link; Yves Baeyens; Young-Kai Chen

A 5-bit 10-Gsample/s A/D converter (ADC) is fabricated in a SiGe BiCMOS process to digitally compensate the signal distortion in a 10-Gb/s optical receiver. A fully differential, flash-type ADC has a wideband track-and-hold amplifier to mitigate the timing skew, followed by high-speed comparators with very small metastability error. It achieves a 4.1 effective bits at low input frequencies and 2.8 effective bits at full-scale 4.9-GHz input signal at 10-Gsample/s.


international microwave symposium | 2007

Highly Efficient Harmonically Tuned InP D-HBT Push-Push Oscillators Operating up to 287 GHz

Yves Baeyens; N. G. Weimann; Vincent Etienne Houtsma; Joe Weiner; Y. Yang; J. Frackoviak; P. Roux; A. Tate; Yung-Jinn Chen

Integrated push-push oscillators, achieving high output power at 210, 235 and 287 GHz, were realized in a 0.5 mum emitter double-heterojunction InGaAs/InP HBT (D-HBT) technology with a maximum oscillation frequency fmax of 335 GHz and a breakdown voltage (Vbceo) of 4 V. The oscillators are based on a balanced Colpitts topology in which a strong second harmonic signal is generated by combining the differential signals at the collector and by reactively tuning the output impedance of the oscillator using a shorted stub. Three oscillators were realized using this topology. A high-power output signal of more then 0 dBm is obtained for oscillators operating at 210 and 232 GHz, an improvement of 5 dB compared to the output power measured on an identical push-push oscillator without 2nd harmonic tuning. Close to -3 dBm output power is obtained at an output frequency of 280 GHz by further reducing the resonator length. By reducing the current, a maximum output frequency of 287 GHz is obtained.


optical fiber communication conference | 2003

10 Gb/s soliton generation for ULH transmission using a wideband GaAs pHemt amplifier

Yuan-Hua Kao; Andreas Leven; Yves Baeyens; Young-Kai Chen; Diego F. Grosz; Frank D. Bannon; Wei-Chiao Fang; Alain P. Kung; Drew N. Maywar; Taras I. Lakoba; Anjali Agarwal; Sonali Banerjee; Tom H. Wood

A novel technique of generating 10 Gb/s soliton data using a wideband GaAs pHemt amplifier is demonstrated and applied in a 10G transmission experiment. Bit-error-rate better than FEC threshold is achieved over 4000km.


topical meeting on silicon monolithic integrated circuits in rf systems | 2008

A Broadband Millimeter-Wave Low-Noise Amplifier in SiGe BiCMOS Technology

Austin Ying-Kuang Chen; Hsiao-Bin Liang; Yves Baeyens; Young-Kai Chen; Yo-Sheng Lin

A broadband millimeter-wave low-noise amplifier (LNA) operating at V-band (50 GHz to 75 GHz) is presented. The circuit is fabricated with 0.18 mum SiGe BiCMOS technology. The matching networks are synthesized with microstrip transmission lines. The LNA achieves a maximum transducer power gain |S21| of ~16 dB, a noise figure of 6.8 dB at 62 GHz, and a 3-dB bandwidth from 54 GHz to 70 GHz. The output return loss is better than 12 dB from 59 GHz to 72 GHz. The reverse isolation |S12| is better than 40 dB over the 3-dB bandwidth. The LNA draws 9.6 mA from a 2.5 V supply.


international solid-state circuits conference | 2007

A 50GS/s Distributed T/H Amplifier in 0.18μm SiGe BiCMOS

Jaesik Lee; Yves Baeyens; Joseph Weiner; Young-Kai Chen

A 3-stage distributed T/H amplifier (DTHA) is presented for high-bit-rate optical receivers and millimeter-wave radios. Distributed topology enhances the bandwidth of the DTHA to >42GHz in track mode. The DTHA achieves 2-tone SFDR of 46dB with 15GHz input signal. The 1.47mm2 chip designed in a 0.18μm SiGe BiCMOS process dissipates 640mW.


custom integrated circuits conference | 2007

CMOS-Based MEMS Mirror Driver for Maskless Lithography Systems

Jaesik Lee; Joseph Weiner; Hsin-Hung Chen; Yves Baeyens; Vladimir A. Aksyuk; Young-Kai Chen

This paper presents a low-power MEMS mirror driver for maskless lithography systems. The CMOS driver consists of a 512 x 128 analog memory cell array to drive the position of 512 x 128 MEMS mirror array. The row driver employs an analog de-multiplexing architecture, which eliminates the need for precise matching among multiple row driver characteristics. It uses two parallel high-speed 8-b DACs with 128 sample-and-hold amplifiers (SHAs) to write a multilevel data into memory cells. To verify its functionality, a prototype test chip is implemented with a self-calibration technique to compensate the cell leakage. The driver chip is implemented in a 0.35-mum digital CMOS process. It consumes a 120 mA power with 3/3.6 V supplies.


custom integrated circuits conference | 2006

Recent Advances in III-V Electronics

Ying-Kuang Chen; Yves Baeyens; N. G. Weimann; Jaesik Lee; Joe Weiner; Vincent Etienne Houtsma; Y. Yang

Compound III-V semiconductor circuits promise fast and power efficient analog, digital and mixed-mode applications. This paper provides an overview of recent advances in high speed III-V compound devices and integrated circuits for high capacity wireless and optic fiber communications. Several critical compound semiconductor ASIC technologies and their unique performance advantages over prevailing silicon CMOS and SiGe technologies will be illustrated


Electronics Letters | 2003

Unpassivated AlGaN/GaN HEMTs with CW power density of 3.2 W/mm at 25 GHz grown by plasma-assisted MBE

Michael J. Manfra; N. G. Weimann; Yves Baeyens; P. Roux; D. M. Tennant


Journal of Catalysis | 2005

A monolithic integrated 180 GHz SiGe HBT push-push oscillator

P. Roux; Yves Baeyens; O. Wohlgemuth; Y.K. Chen


Physica Status Solidi (c) | 2006

InP double‐hetero bipolar transistor technology for 130 GHz clock speed

N. G. Weimann; Vincent Etienne Houtsma; Y. Yang; J. Frackoviak; A. Tate; Jianxin Chen; Joe Weiner; Jaesik Lee; Yves Baeyens; Y. K. Chen

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