Jean-Louis Sanchez

Integrated LC Filter on Silicon for DC–DC Converter Applications

The integration of passive components on silicon for future dc-dc converter applications is still a challenging area of research. This paper reports the microfabrication of a fully integrated filter containing a spiral inductor on top of a 3-D capacitor. A thin magnetic shielding layer is introduced between the two components demonstrating that losses caused by the inductor in the capacitor area are reduced, thus increasing the maximum working frequency of the whole component. The fabricated filter was characterized in a test circuit (buck-type converter).

Realization of vertical P/sup +/ walls through-wafer for bi-directional current and voltage power integrated devices

P/sup +/ walls through wafer can be considered as a region key in the 3D architecture of new bi-directional current and voltage power integrated devices. In this paper, we demonstrate the possibility of fabricating these P/sup +/ walls combining the deep RIE of silicon and deposit of boron doped polysilicon.

New Self-Switching Converters

This paper presents an original concept in which integrated over-voltage and/or over-current protections of power devices are used to produce a self-switching operation. Such a commutation is shown as a possible combination with conventional forced-switching and spontaneous-switching to simplify direct regenerative ac-dc conversion, insulating dc-ac-dc conversion and finally direct ac-ac conversion. Experimental results prove the feasibility of the concept through which the self turn-off operation is likely to offer the best practical gains.

The concave junction: an attractive topology to design specific junction terminations

In this paper a new junction topology, the concave junction, and its application in specific junction terminations are presented. We demonstrate, by solving the ionization integrals in the non-punchthrough case, that the breakdown voltage of this type of junction can be higher than that of the infinite plane junction. Based on numerical simulations, we investigate the use of this property to design peripheral terminations for vertical devices with very deep trenches.

Measurement of Charge Evolution in Oxides of DC Stressed MOS Structures

This work addresses electric charge measurement in gate oxides of metal-oxide-semiconductor (MOS) structures submitted to dc stress similar to that applied in power electronics components during service (2 MV/cm to 4 MV/cm). The qualitative and quantitative variation of the charge is analyzed via capacitance-voltage and thermal-step measurements, taking into account the structure geometry and the different phenomena occurring during stress. It is shown that, while the capacitance-voltage technique, which is mainly sensitive to the charges placed near the substrate, the thermal-step method is more sensitive for detecting the charges placed all over the oxide. It is shown that the association of the two complimentary techniques can allow to identify and to localize the charges across the quasi-totality of the gate oxide.

Design of an Integrated Self-Switching Mode Device for Power Converters

In this paper, we present a design procedure for the integration of a new specific function based on the association of a ZVS mode thyristor and a circuit breaker dedicated to self-switching mode power converters. This function, based on the functional integration concept, monolithically associates protection, self-drive and power switch functions. This function uses an original switching mode of operation. After presenting the characteristics of the function and the function specifications, we focus on the different design steps: function optimization and cells sizing using 2D electrical and technological simulations, and mask design.

Realization of vertical P + wall through-wafer

P+ walls through wafer can be considered as key regions in the 3D architecture of new bi-directional current and voltage power integrated devices. Moreover, these P+ walls can be used as electrical vias in the design of microsystems, in order to make easier 3D packaging. In this paper, we demonstrate the possibility of fabricating these P+ walls combining the deep RIE of silicon and deposit of boron-doped polysilicon.

Micro inductors using low temperature fabrication processes for integrated DC-DC microconverters

We present in this paper trends and technologies for the integration of inductors for DC-DC microconverters. In particular, we present the fabrication steps of different structures as a function of the application: planar inductors for low power consumption, and 3D magnetic inductors for higher power. These devices are achieved using low temperature fabrication processes based in photolithography or and electroplating techniques.

A new self-firing MOS-thyristor device: optimization of the turn-off performance and experimental results

In this paper, a new integrated self-firing and controlled turn-off MOS-thyristor structure is investigated. An analytical model describing the turn-off operation and parasitic latch-up was developed, allowing to highlight and optimize the physical and geometrical parameters acting upon main electrical characteristics. The analytical model is validated by two-dimensional (2D) simulations using PISCES. The technological fabrication process is optimized by 2D simulations using SUPREM IV. Electrical characterization results of fabricated test structures are presented.

Towards reduced threshold voltages for vertical power Mosfet transistors

The threshold voltage of insulated gate power transistors usually is around 3 to 4V and their nominal gate to source voltage between 15 and 20V. These unanimously recognized electrical characteristics are questioned in this paper in order to evaluate which benefits could be drawn from a reduction of the threshold voltage of power transistors. Logic level MOSFETs already exist, but this paper chooses to study theoretically the electrical and physical characteristics of power transistors as a function of the threshold voltage to see if these electrical values of power electronics standards are still appropriate. It appears that the reduction of the threshold voltage of power MOSFET reduces the amount of control power and may improve switching characteristics.