Patrick Austin
Centre national de la recherche scientifique
Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by Patrick Austin.
european conference on radiation and its effects on components and systems | 2009
A Luu; Patrick Austin; F Miller; N Buard; Thierry Carrière; P Poirot; R Gaillard; Marise Bafleur; Gérard Sarrabayrouse
This paper presents 2-D numerical simulation results which allow the definition of the sensitive volume and triggering criteria of SEBs for VDMOS in classic planar-type technology. The results analysis allows for a better understanding of the SEB mechanism.
european conference on radiation and its effects on components and systems | 2007
Aurore Luu; Florent Miller; Patrick Poirot; R. Gaillard; Nadine Buard; Thierry Carriere; Patrick Austin; Marise Bafleur; Gérard Sarrabayrouse
This paper presents a validation of the methodology based upon backside laser irradiations to characterize the sensitivity of power devices towards single-event burnout. This is done thanks to high-energy heavy ion testing and device simulations.
Microelectronics Reliability | 2011
Moustafa Zerarka; Patrick Austin; Marise Bafleur
Abstract IGBT power components are more and more used in atmospheric and space applications. Thus, it is essential to study the influence of the natural radiation environment (NRE) on the electrical behavior of planar and trench IGBTs. 2-D numerical simulations are performed to define the sensitive volume and triggering criteria of SEBs for planar and trench IGBTs for different configurations of ionizing tracks. The analysis of the results allows a better understanding of the SEB mechanism in each structure and comparing the behavior and the robustness of these two technologies under heavy-ion irradiation.
international symposium on power semiconductor devices and ic s | 2003
Jean-Louis Sanchez; E. Scheid; Patrick Austin; M. Breil; H. Carriere; P. Dubreuil; Éric Imbernon; F. Rossel; B. Rousset
P/sup +/ walls through wafer can be considered as a region key in the 3D architecture of new bi-directional current and voltage power integrated devices. In this paper, we demonstrate the possibility of fabricating these P/sup +/ walls combining the deep RIE of silicon and deposit of boron doped polysilicon.
international semiconductor conference | 2001
Éric Imbernon; J. L. Sanchez; Patrick Austin; Marie Breil; Olivier Causse; Bernard Rousset; Françoise Rossel
In this paper, a flexible technological process suitable for the development of complex integrated power structures based on the functional integration mode is presented. This technological process is based on a succession of basic technological steps corresponding to the fabrication of IGBT devices and compatible specific steps supporting more complex functions.
international symposium on power semiconductor devices and ic s | 1999
Jean-Pierre Laur; J-L. Sanchez; M. Marmouget; Patrick Austin; J. Jalade; M. Breil; M. Roy
In this paper, a new circuit-breaker integrated device for low power electronic circuit protection, based on the functional integration mode, is investigated. The influence of the physical and technological parameters of this device upon the main electrical characteristics has been analyzed using analytical models and the ATLAS software tool. The initial experimental results are presented.
european conference on radiation and its effects on components and systems | 2011
S. Morand; Florent Miller; Patrick Austin; Patrick Poirot; R. Gaillard; T. Carrière; Nadine Buard
Proton accelerator and pulsed laser tests show that temperature induces large variations compared to room temperature for power electronic radiation sensitivity assessment.
international symposium on power semiconductor devices and ic's | 2002
H. Hakim; Jean-Louis Sanchez; Jean-Pierre Laur; Patrick Austin; M. Breil
In this paper a new junction topology, the concave junction, and its application in specific junction terminations are presented. We demonstrate, by solving the ionization integrals in the non-punchthrough case, that the breakdown voltage of this type of junction can be higher than that of the infinite plane junction. Based on numerical simulations, we investigate the use of this property to design peripheral terminations for vertical devices with very deep trenches.
international semiconductor conference | 1999
Olivier Causse; Patrick Austin; J. L. Sanchez
A new peripheral symmetrical planar structure of junction termination type is presented, allowing symmetrical blocking voltage. This peripheral structure can be considered as a new element for power monolithic integration. Based on 2D simulations, this peripheral structure has been optimized to obtain the maximum two-directional breakdown voltage capability.
international conference mixed design of integrated circuits and systems | 2007
F. Capy; Abdelhakim Bourennane; M. Breil; Frédéric Richardeau; E. Imbernon; Jean-Louis Sanchez; Jean-Pierre Laur; Patrick Austin
In this paper, we present a design procedure for the integration of a new specific function based on the association of a ZVS mode thyristor and a circuit breaker dedicated to self-switching mode power converters. This function, based on the functional integration concept, monolithically associates protection, self-drive and power switch functions. This function uses an original switching mode of operation. After presenting the characteristics of the function and the function specifications, we focus on the different design steps: function optimization and cells sizing using 2D electrical and technological simulations, and mask design.