Jean-Marc Daveau

Protocol selection and interface generation for HW-SW codesign

The aim of this paper is to present a communication synthesis approach stated as an allocation problem. In the proposed approach, communication synthesis allows to transform a system composed of processes that communicate via high-level primitives through abstract channels into a set of processes executed by interconnected processors that communicate via signals and share communication control. The proposed communication synthesis approach deals with both protocol selection and interface generation and is based on bindinglallocation of communication units.- This approach allows a wide design space exploration through automatic selection of communication protocols. We present a new algorithm that performs binding/allocation of communication units. This algorithm makes use of a cost function to evaluate different allocation alternatives. We illustrate through an example the usefulness of the algorithm for allocating automatically different protocols within the same application system.

Synthesis of system-level communication by an allocation-based approach

Abstract: Communication synthesis aims to transform a system with processes that communicate via high level primitives through channels into interconnected processes that communicate via signals and share communication control. We present a new algorithm that performs binding/allocation of communication units. This algorithm makes use of a cost function to evaluate different allocation alternatives. The proposed communication synthesis approach deals with both protocol selection and interface synthesis and is based on binding/allocation of communication units. We illustrate through an example the usefulness of the algorithm for allocating automatically different protocols within the same system.

VHDL generation from SDL specifications

The aim of this paper is to present an approach that allows the generation of VHDL from system level specifications in SDL. Our approach overcomes the main known problem encountered by previous work, which is the communication between different processes. We allow SDL communication to be translated into VHDL for synthesis. This is made possible by the use of an intermediate form that supports a powerful communication model which enables the representation in a synthesis oriented manner of most communication schemes. This intermediate form allows the refinement of the system in order to obtain the desired solution. The main refinement step, called communication synthesis, is aimed at fixing the protocol and the interface used by the different processes to communicate. The refined specification is translated into VHDL for synthesis using existing CAD tools. We illustrate the feasibility of our approach through two SDL to VHDL translation examples.

Hardware/software co-design of an ATM network interface card: a case study

This paper discusses a case study, the co-design of an ATM Network Interface Card (NIC). The NIC is aimed to interface applications with the physical network line. It is composed of a stack of four protocol layers: TCP, IP, AAL and ATM. In this study, the initial specification is given in a language called SDL. The architecture exploration is made using Cosmos, a co-design tool for multiprocessor architecture. Several architectures are produced starting from the same initial SDL specification. The performance evaluation of these solutions,vas made using C/VHDL co-simulation. This paper describes the experiment and the lessons learned about the capabilities and the restrictions of Cosmos and SDL. The use of SDL allows for drastic reduction of the model size when compared to C/VHDL model. SDL simulation may be 100 times faster than C/VHDL simulation. SDL provides powerful capabilities for system-level specification, but lacks facilities for the expression of DSP oriented computation.

Communication interface synthesis for multilanguage specifications

Nowadays the design of complex systems requires the cooperation of several teams belonging to different cultures and using different languages. It is necessary to dispose of new design and verification methods to handle multilanguage approaches. This paper presents an approach for the communication interface synthesis of multilanguage specifications. In the proposed approach, communication synthesis allows to transform a system composed of subsystems, described in different languages that communicate via different communication primitives through communication channels, into a set of interconnected processors that communicate via signals and share communication controls. An example illustrates the usefulness of this approach for the design of an adaptive speed control system that was described in SDL and Matlab.

A system-level communication synthesis approach for hardware/software systems

This paper presents a new method for modelling and synthesising a wide range complex communication schemes. These schemes can range from simple protocols that govern access to shared resources to complex protocols that are commonly used in software-only systems such as computer networks. The proposed communication synthesis method deals with both protocol and interface synthesis and is based on communication unit allocation. We highlight within this paper the usefulness of this method when synthesising communication schemes for mixed hardware/software systems.

Interlanguage Communication Synthesis for Heterogeneous Specifications

Nowadays the design of complex systems requires the cooperation of several teams belonging to different cultures and using different languages. It is necessary to dispose of new design and verification methods to handle multilanguage approaches. This paper presents an approach for the interlanguage communication synthesis of heterogeneous specifications. The system is represented by a set of interconnected subsystems specified in different languages with different concepts, different interface types, different communication schemes and some of them can even be IP modules. The subsystems exchange data through abstract communication channels. The objective is to refine the abstract communication channels into an implementation. The result is a set of interconnected processors communicating through signals, buses and dedicated components. An example illustrates the usefulness of this approach for the design of an adaptive speed control system that was described in SDL and Matlab.