Jean-Marc Philippe

The M2DC Project: Modular Microserver DataCentre

The Modular Microserver DataCentre (M2DC) project will investigate, develop and demonstrate a modular, highly-efficient, cost-optimized server architecture composed of heterogeneous microserver computing resources, being able to be tailored to meet requirements from various application domains such as image processing, cloud computing or HPC. M2DC will be built on three main pillars: a flexible server architecture that can be easily customised, maintained and updated, advanced management strategies and system efficiency enhancements (SEE), well-defined interfaces to surrounding software data centre ecosystem.

Data centres for IoT applications: The M2DC approach (Invited paper)

The Modular Microserver DataCentre (M2DC) project investigates, develops and demonstrates a modular, highly-efficient, cost-optimized server architecture composed of heterogeneous micro server computing resources, being able to be tailored to meet requirements from various application domains, including the Internet of Things. M2DC is built on three main pillars: a flexible server architecture that can be easily customised, maintained and updated; advanced management strategies and system efficiency enhancements (SEE); well-defined interfaces to surrounding software data centre ecosystem.

NeuroDSP Accelerator for Face Detection Application

Neuro-Inspired Vision approach, based on models from biology, allows to reduce the computational complexity. One of these models - The Hmax model - shows that the recognition of an object in the visual cortex mobilizes V1, V2 and V4 areas. From the computational point of view, V1 corresponds to the area of the directional filters (for example Gabor filters or wavelet filters). This information is then processed in the area V2 in order to obtain local maxima. This new information is then sent to an artificial neural network. This neural processing module corresponds to area V4 of the visual cortex and is intended to categorize objects present in the scene. In order to realize autonomous vision systems (low-power consumption) with such treatments inside, we studied a new architeure of a Neural Processor named NeuroDSP. We describe in this paper an optimized Hmax model implementation on this Neural Processor for a face detection application.

M2DC – Modular Microserver DataCentre with heterogeneous hardware

The Modular Microserver DataCentre (M2DC) project investigates, develops and demonstrates a modular, highly-efficient, cost-optimized server architecture composed of heterogeneous microserver computing resources. The resulting server architecture will be able to be tailored to meet requirements from a wide range of application domains. M2DC is built on three main pillars: a flexible server architecture that can be easily customised, maintained and updated; advanced management strategies and system efficiency enhancements (SEE); well-defined interfaces to the surrounding software data centre ecosystem. In this paper, we focus in particular on the thermal management strategies and on the initial benchmarking of the Aarch64 ARM architecture.

M2DC – A Novel Heterogeneous Hyperscale Microserver Platform

The Modular Microserver Datacentre (M2DC) project targets the development of a new class of energy-efficient TCO-optimized appliances with built-in efficiency and dependability enhancements. The appliances will be easy to integrate with a broad ecosystem of management software and fully software defined to enable optimization for a variety of future demanding applications in a cost-effective way. The highly flexible M2DC server platform will enable customization and smooth adaptation to various types of applications, while advanced management strategies and system efficiency enhancements (SEE) will be used to improve energy efficiency, performance, security, and reliability. Data center capable abstraction of the underlying heterogeneity of the server is provided by an OpenStack-based middleware. In this chapter, we focus in particular on the architecture of the server platform including a dedicated high-speed, low latency communication infrastructure, give a short introduction into the software stack including thermal management strategies, and provide an overview of the targeted applications.

Exploration and design of embedded systems including neural algorithms

The current trend in embedded systems is to make them surrounding the users, providing services thanks to a knowledge of their environment. These self-awareness and context-awareness properties are provided by numerous sensors, from different types. Using the provided information causes at least two problems: the fusion of data from different sources, and the noise induced by sensors which are closer from the processing unit than ever. Additionally, the needed applications that use these information are based on different recognition processings, sometimes not easy to formalize with conventional algorithms. Processing chains using neural-based algorithms are promising approaches for solving these kinds of issues. Unfortunately, embedding bio-inspired algorithms in an embedded system is not so easy since there is no exploration environment for this specific task. Moreover, neural networks often need pre- or postprocessing of data for optimal operation. In fact, there is a balance to find between pre-processing and neural network processing: for example, adding more filtering to clean or to transform data (like convolution filters or FFT) enables to have smaller neural networks, leading to less number of neurons, less learning time and finally more efficient applications. This paper presents early results of a collaboration towards the design of such an exploration environment coming from a joint laboratory between an SME and a Research Institute. The main object coming from the current collaboration is the coupling of a rich exploration environnement of embedded systems (including multi/manycore) with a neural network exploration tool. The combination of the two enables us to have feedbacks concerning both algorithm efficiency and performances and other non-functional metrics regarding the target system for driving the co-design cycle of industrial embedded systems.