Jean-Pierre Schoellkopf

One time programmable drift antifuse cell reliability

An innovative non-volatile memory cell based on gate oxide breakdown is presented. The full compatibility with a standard CMOS process and the limited programming current per cell make the drift antifuse a low cost and dense non-volatile storage solution. Reliable storage is demonstrated and results from both device architecture and design optimization are given.

An alpha immune and ultra low neutron SER high density SRAM

Terrestrial radiations, such as neutrons or alpha, create charges which, when collected by sensitive memory nodes, can destroy its stored information. Such a failure is called a soft error since only the data is destroyed while the circuit itself is not permanently damaged. Today, as the dimensions and operating voltages of semiconductor devices are continually reduced, the intrinsic SRAM sensitivity to ionizing radiations significantly increases. Whereas there is a linear and moderate increase on a per Mbit basis, the system SER significantly grows up together with the amount of SRAMs embedded in the chips. To meet the increasing need for both robust and highly integrated SRAMs, an original 3D memory device has been developed mixing SRAM and eDRAM capacitors. This memory cell, named rSRAM/spl trade/ cell (r standing for robust), has been validated through a testchip manufactured in a standard 120 nm CMOS technology.

A very high resolution DAC at 1kHz for space applications

In this paper a 24-bit Digital to Analog Converter using the ΣΔ modulation suitable for space applications is presented. This converter operates in the frequency range of 0.1 mHz up to 1kHz It features a current steering output stage consisting of 32 differential current sources. The device includes an I2C protocol which allows the selection of the Oversampling, Ratio of the converter to be either x128 or x256 for a 12 kHz or 6 kHz sampling ratio respectively. This circuit can be used either as a stand alone device or embedded into an ASIC as an IP core.

Low-Power Design Solutions for Wireless Multimedia SoCs

With advanced semiconductor technology nodes, power management has become a global problem. In battery powered applications, this problem is even more critical. This article describes a range of design solutions that STMicroelectronics uses to manage dynamic and static power while meeting its targets for area and performance.