Jen-Shiang Wang

Mask process correction (MPC) modeling and its application to EUV mask for electron beam mask writer EBM-7000

In electron beam writing on EUV mask, it has been reported that CD linearity does not show simple signatures as observed with conventional COG (Cr on Glass) masks because they are caused by scattered electrons form EUV mask itself which comprises stacked heavy metals and thick multi-layers. To resolve this issue, Mask Process Correction (MPC) will be ideally applicable. Every pattern is reshaped in MPC. Therefore, the number of shots would not increase and writing time will be kept within reasonable range. In this paper, MPC is extended to modeling for correction of CD linearity errors on EUV mask. And its effectiveness is verified with simulations and experiments through actual writing test.

Performance and stability of mask process correction for EBM-7000

In order to support complex optical masks today and EUV masks in the near future, it is critical to correct mask patterning errors with a magnitude of up to 20nm over a range of 2000nm at mask scale caused by short range mask process proximity effects. A new mask process correction technology, MPC+, has been developed to achieve the target requirements for the next generation node. In this paper, the accuracy and throughput performance of MPC+ technology is evaluated using the most advanced mask writing tool, the EBM-70001), and high quality mask metrology . The accuracy of MPC+ is achieved by using a new comprehensive mask model. The results of through-pitch and through-linewidth linearity curves and error statistics for multiple pattern layouts (including both 1D and 2D patterns) are demonstrated and show post-correction accuracy of 2.34nm 3σ for through-pitch/through-linewidth linearity. Implementing faster mask model simulation and more efficient correction recipes; full mask area (100cm2) processing run time is less than 7 hours for 32nm half-pitch technology node. From these results, it can be concluded that MPC+ with its higher precision and speed is a practical technology for the 32nm node and future technology generations, including EUV, when used with advance mask writing processes like the EBM-7000.

Defect printability analysis by lithographic simulation from high resolution mask images

We report the development of Mask-LMC for defect printability evaluation from sub-200nm wavelength mask inspection images. Both transmitted and reflected images are utilized, and both die-to-die and die-to-database inspection modes are supported. The first step of the process is to recover the patterns on the mask from high resolution T and R images by de-convolving inspection optical effects. This step uses a mask reconstruction model, which is based on rigorous Hopkins-modeling of the inspection optics, and is pre-determined before the full mask inspection. After mask reconstruction, wafer scanner optics and wafer resist simulations are performed on the reconstructed mask, with a wafer lithography model. This step leverages Brions industry-proven, hardware-accelerated LMC (Lithography Manufacturability Check) technology1. Existing litho process models that are in use for Brions OPC+ and verification products may be used for this simulation. In the final step, special detectors are used to compare simulation results on the reference and defect dice. We have developed detectors for contact CD, contact area, line and space CD, and edge placement errors. The detection results on test and production reticles have been validated with AIMSTM.

Massive metrology using fast e-beam technology improves OPC model accuracy by >2x at faster turnaround time

Classical SEM metrology, CD-SEM, uses low data rate and extensive frame-averaging technique to achieve high-quality SEM imaging for high-precision metrology. The drawbacks include prolonged data collection time and larger photoresist shrinkage due to excess electron dosage. This paper will introduce a novel e-beam metrology system based on a high data rate, large probe current, and ultra-low noise electron optics design. At the same level of metrology precision, this high speed e-beam metrology system could significantly shorten data collection time and reduce electron dosage. In this work, the data collection speed is higher than 7,000 images per hr. Moreover, a novel large field of view (LFOV) capability at high resolution was enabled by an advanced electron deflection system design. The area coverage by LFOV is >100x larger than classical SEM. Superior metrology precision throughout the whole image has been achieved, and high quality metrology data could be extracted from full field. This new capability on metrology will further improve metrology data collection speed to support the need for large volume of metrology data from OPC model calibration of next generation technology. The shrinking EPE (Edge Placement Error) budget places more stringent requirement on OPC model accuracy, which is increasingly limited by metrology errors. In the current practice of metrology data collection and data processing to model calibration flow, CD-SEM throughput becomes a bottleneck that limits the amount of metrology measurements available for OPC model calibration, impacting pattern coverage and model accuracy especially for 2D pattern prediction. To address the trade-off in metrology sampling and model accuracy constrained by the cycle time requirement, this paper employs the high speed e-beam metrology system and a new computational software solution to take full advantage of the large volume data and significantly reduce both systematic and random metrology errors. The new computational software enables users to generate large quantity of highly accurate EP (Edge Placement) gauges and significantly improve design pattern coverage with up to 5X gain in model prediction accuracy on complex 2D patterns. Overall, this work showed >2x improvement in OPC model accuracy at a faster model turn-around time.

Accurate characterization of 2D etch bias by capturing surrounding effects from resist and trench areas

The extension of optical lithography to 7 nm node and beyond relies heavily on multiple litho-etch patterning technologies. The etch processes in multiple patterning often require progressively large bias differences between litho and etch as the target features become smaller. Moreover, since this litho-etch bias has strong pattern dependency, it must be taken into consideration during the Optical Proximity Correction (OPC) processes. Traditionally, two approaches are used to compensate etch biases: rule-based retargeting and model-based retargeting. The rule-based approach has a turn-around-time advantage but now has challenges meeting the increasingly tighter critical dimension (CD) requirements using a reasonable etch-bias table, especially for complex 2D patterns. Alternatively, model-based retargeting can meet these CD requirements by capturing the etch process physics with high accuracy, including the etch bias variability that arises from both patterning proximity effects and etch chamber non-uniformity. In the past, empirical terms have been used to approximate the etch bias due to pattern proximity effects but sometimes empirical models are known to have compromised model accuracy so a physical based approach is desired. This paper’s work will address the etch bias variability due to patterning proximity effects by using a physical approach based simplified chemical kinetics. It starts from a well calibrated After-Development-Inspection (ADI) model and the subsequent etch model is based on the ADI model contour. By assuming that plasma chemical species in the trenches are maintained in an equilibrium state, the plasma species act on the edges to induce etch bias. Methods are developed to evaluate plasma collision probability on trench edges for random layouts. Furthermore, the impact of resist materials on etch bias are treated with Arrhenius equation or as a second order reaction. Equations governing plasma collision probabilities on trench edges as a function of time are derived. An etch bias model can be calibrated based on those equations. Experimental results have shown that this physical approach to model etch bias is a promising direction to applications for full-chip etch proximity corrections.

Flexible power 90W to 120W ArF immersion light source for future semiconductor lithography

Semiconductor market demand for improved performance at lower cost continues to drive enhancements in excimer light source technologies. Increased output power, reduced variability in key light source parameters, and improved beam stability are required of the light source to support immersion lithography, multi-patterning, and 450mm wafer applications in high volume semiconductor manufacturing. To support future scanner needs, Cymer conducted a technology demonstration program to evaluate the design elements for a 120W ArFi light source. The program was based on the 90W XLR 600ix platform, and included rapid power switching between 90W and 120W modes to potentially support lot-to-lot changes in desired power. The 120W requirements also included improved beam stability in an exposure window conditionally reduced by 20%. The 120W output power is achieved by efficiency gains in system design, keeping system input power at the same level as the 90W XLR 600ix. To assess system to system variability, detailed system testing was conducted from 90W – 120W with reproducible results.

Mask-LMC: lithographic simulation and defect detection from high-resolution mask images

We report the development of Mask-LMC for defect printability evaluation from sub-200nm wavelength mask inspection images. Both transmitted and reflected images are utilized, and both die-to-die and die-to-database inspection modes are supported. The first step of the process is to recover the patterns on the mask from high resolution T and R images by de-convolving inspection optical effects. This step uses a mask reconstruction model, which is based on rigorous Hopkins-modeling of the inspection optics, and is pre-determined before the full mask inspection. After mask reconstruction, wafer scanner optics and wafer resist simulations are performed on the reconstructed mask, with a wafer lithography model. This step leverages Brions industry-proven, hardware-accelerated LMC (Lithography Manufacturability Check) technology1. Existing litho process models that are in use for Brions OPC+ and verification products may be used for this simulation. In the final step, special detectors are used to compare simulation results on the reference and defect dice. We have developed detectors for contact CD, contact area, line and space CD, and edge placement errors. The detection result has been validated with AIMSTM.