Jenny Lian

Hydrogen induced tunnel emission in Pt/(BaxSr1−x)Ti1+yO3+z/Pt thin film capacitors

The leakage current density–applied field (J−EA) characteristics of (BaxSr1−x)Ti1+yO3+z (BSTO) thin film capacitors with Pt electrodes that have been annealed in forming gas (95% Ar 5% H2 or D2) were investigated over the temperature range from −60 to +60 °C. Forming gas annealing significantly increased the leakage current density. The J–EA characteristics exhibited features that could not be fully explained by either a simple thermionic emission or tunneling (Fowler–Nordeim) formalism. Using the general charge transport theory of Murphy and Good, we show that the J–EA characteristics can be successfully interpreted in terms of tunneling of electrons through the interfacial Schottky barrier with the peak in energy distribution of the incident carriers strongly dependent on applied field. At high applied fields the energy distribution of incident carriers is peaked near the Fermi level in the electron injecting metal electrode at all temperatures considered in this study, leading to almost temperature ind...

Three dimensional (BA, SR) TIO3 stack capacitors for dram application

Abstract Three dimensional integration of BSTO thin films for Gigabit DRAM application is performed by a MOCVD BST process combined with a high temperature barrier stack of TaSiN/Ir/IrO2 with SiO2 sidewall protection. The SiO2 layer is formed by a new low temperature HDP process. This barrier stack enables the use of a new two step high temperature MOCVD BST process, which results in high quality BST films. First, a very thin BST seed layer is deposited at 450°C. The second layer is formed at 640°C. Using these two key processes, we have established a baseline for BST capacitors on 0.2μm feature size. 256k capacitor arrays show capacitance up to 18.1 fF/cell with excellent leakage current around 1 fA/cell (DC, 1V). The capacitance is scaling with different capacitor arrays (4k to 256k).

Characteristics of an Oxygen Barrier Based on Bi-layered Ir

For high-density ferroelectric random access memory devices (FeRAMs) with capacitor over plug (COP) structure, oxygen diffusion barriers based on bi-layered Ir have been investigated. This paper describes the detailed characteristics of the barriers. A bi-layered Ir barrier was fabricated by repeating the deposition and RTO treatment of an Ir metal film, which was very effective to obtain excellent barrier properties against oxygen diffusion. Surface roughening was shown after RTO, but can be suppressed by lowering the RTO temperature. The roughening is caused by the formation of a gaseous phase of IrOx during RTO, and not by the formation of Ir hillocks. The stress of the bi-layered Ir barrier is tensile after RTO, which makes further stacking of more layers on the barrier with good adhesion possible. Performance of this barrier was checked using the post annealing in 18O isotope ambient at 650°C for 2 hours. SIMS profile showed the barrier prevented the diffusion of 18O, effectively. The above results strongly suggest that the bi-layered Ir barrier can be applied to the COP structure for high-density FeRAMs.

Cost Efficient Novel High Performance Analog Devices Integrated with Advanced HKMG Scheme for 28nm CMOS Technology and Beyond

Cost Efficient Novel High Performance Analog Devices Integrated with Advanced HKMG Scheme for 28nm CMOS Technology and Beyond J.-P. Han, T. Shimizu, L.-H. Pan, M. Voelker, C. Bernicot, F. Arnaud, A. C. Mocuta, K. Stahrenberg, A. Azuma, G. Yang, M. Eller, D. Jaeger, H. Zhuang, K. Miyashita, K. Stein, D. Nair, J.-H. Park, M. Hamaguchi, S. Kohler, D. Chanemougame, W. Li, K Kim, N. Kim, C. Wiedholz, S. Miyake, G. Tsutsui, H. van Meer, J. Liang, M. Ostermayr, J. Lian, M. Celik, R. Donaton, K. Barla, M.H. Na, Y. Goto, M. Sherony, F. Johnson, R. Wachnik, J. Sudijono,E. Kaste, R. Sampson, J.-H. Ku, A. Steegen, W. Neumueller Infineon Technologies, Renesas, IBM Microelectronics, STMicroelectronics, Toshiba America, GLOBALFOUNDRIES, Samsung Electronics, alliances at IBM SRDC, 2070 Rt 52, Hopewell Junction, NY12533; jh262@ieee.org,