Jeonghu Han

A simple and accurate method for extracting substrate resistance of RF MOSFETs

In this paper, a simple and accurate method was proposed for extracting substrate resistance of an RF MOSFET, the substrate of which is represented by a single resistor. The extraction results from the measured network parameters are presented for various bias conditions. Excellent agreement between the results of measurements and the model for the extracted substrate resistance was obtained up to 18 GHz. Also, the resistance extracted using the proposed method was shown to give scalable results.

Complete high-frequency thermal noise modeling of short-channel MOSFETs and design of 5.2-GHz low noise amplifier

Taking a velocity saturation effect and a carrier heating effect in the gradual channel region, complete thermal noise modeling of short-channel MOSFETs including the induced gate noise and its correlation coefficients is presented and verified extensively with experimentally measured data. All of the four noise models have excellently predicted experimental data with maximal error less than 10% for the deep-submicron MOSFETs. Using these models and a simultaneous matching technique for both optimal noise and power, a low noise CMOS amplifier optimized for 5.2-GHz operation has been designed and fabricated. Experiments using an external tuner show that both NF/sub 50/ and NF/sub min/ are very close to 1.1 dB, which is an excellent figure of merit among reported LNAs.

A simple four-terminal small-signal model of RF MOSFETs and its parameter extraction

Abstract After differences between the RF MOSFET and conventional high-frequency transistors, which make the proper modeling of RF MOSFET complicated and difficult, are addressed, a four-terminal small-signal model of an RF MOSFET with a very simple and accurate parameter extraction method is presented. This model includes the intrinsic and extrinsic elements important for RF AC simulation in the strong inversion operation region. Accuracy of the model and extraction method is verified with the measured data and the needs of the intrinsic body node are demonstrated to describe the gate bias dependence of the substrate-signal-coupling effect.

A scalable model for the substrate resistance in multi-finger RF MOSFETs

We present a method to extract the substrate resistance of RF MOSFETs. We also analyze the substrate networks of multi-finger RF MOSFETs with vertical body contacts and propose a new method to predict the substrate resistance for any number of gate fingers. After the resistance components of the substrate networks are extracted, the effective substrate resistance is expressed as a function of the number of gate fingers. We compare the values of the substrate resistance predicted by the proposed method, and extracted from Y-parameter data. The Y-parameters are obtained from both device simulation and measurement. The model predicts the substrate resistances accurately for multi-finger transistors.

On the large-signal CMOS modeling and parameter extraction for RF applications

A small-signal equivalent circuit of an RF MOSFET not only fully compatible with 4 terminal large-signal quasi-static I-V and Q-V models but suitable for 3 terminal two-port s-parameter measurement, is proposed along with very simple and accurate parameter extraction method. This model includes the intrinsic and extrinsic elements important for AC simulation at RF. The validity and accuracy of our approach is verified from 0.18 /spl mu/m RF NMOS results.

Extraction method for substrate resistance of RF MOSFETs

This paper proposes a simple and accurate method for extracting substrate resistance of an RF MOSFET from the measured network parameters. The extraction results for 0.18-/spl mu/m MOSFETs are presented for various bias conditions and devices with different geometries.