Jeroen Van de Kerkhove

Contour quality assessment for OPC model calibration

Site-based SEM measurements produce accurate OPC models in 180nm to 65nm technology nodes, but the lack of 2D information has prompted for new calibration methods for sub 65nm designs. A hybrid technique using site-based SEM measurements together with SEM contours has been developed to produce more accurate OPC models. Contour samples account for 2D effects while CD sites provide high accuracy 1D measurements. SEM contours are prone to sampling and processing errors as well as extensive calibration run time. We develop a method to filter out inferior samples prior to model calibration to effectively decrease calibration runtime and increase model accuracy. Fitness and coverage metrics are used to assess the quality of the contour data in order to select the best subset of the calibration contours. Our results demonstrate a selection routine that consistently performs better than picking contours at random, and we discuss the trade-offs between coverage, accuracy and runtime with respect to model quality.

Measurement technology to quantify 2D pattern shape in sub-2x nm advanced lithography

We have succeeded in quantifying changes in 2D pattern shape, which are induced by exposure condition and Optical Proximity Correction (OPC), from CD-SEM image. In the current lithography technology, micro patterns which are close to resolution limit are printed on wafer by fully utilizing aggressive OPC technology. In such lithography technology, controlling the shape of printed patterns is extremely difficult. In order to control such difficult patterning process, a demand to precisely quantify the pattern shape of 2D patterns is significantly growing. SEM images captured by CD-SEM are used mainly for the measurement of one dimensional size such as line width and contact hole diameter. It has been said not easy to measure shape variation of 2D patterns such as corner and line end from SEM images. However, we have succeeded in quantifying pattern shape of 2D pattern by utilizing Advanced SEM contouring technology which is combined with CD-gap-free contouring technology [1] and Fine SEM Edge (FSE) technology [2]. By this, we could quantitatively measure shape variation which are induced by exposure condition variability and/ or OPC, which used to be considered difficult to quantify. For the verification of this new measurement technology, wafers on which printed 2D patterns that are exposed in different conditions and with varied SRAF changed in size and position are prepared. The 2D patterns are measured by CD-SEM and SEM images of the 2D patterns are taken. To the SEM images of the 2D patterns, this new measurement technology is applied to quantitatively analyze how the expose condition and SRAF variation affect the printed 2D pattern shape. In this paper, the results of above experiments are reported.

Metal1 patterning study for random-logic applications with 193i, using calibrated OPC for litho and etch

A Metal1-layer (M1) patterning study is conducted on 20nm node (N20) for random-logic applications. We quantified the printability performance on our test vehicle for N20, corresponding to Poly/M1 pitches of 90/64nm, and with a selected minimum M1 gap size of 70nm. The Metal1 layer is patterned with 193nm immersion lithography (193i) using Negative Tone Developer (NTD) resist, and a double-patterning Litho-Etch-Litho-Etch (LELE) process. Our study is based on Logic test blocks that we OPCed with a combination of calibrated models for litho and for etch. We report the Overlapping Process Window (OPW), based on a selection of test structures measured after-etch. We find that most of the OPW limiting structures are EOL (End-of-Line) configurations. Further analysis of these individual OPW limiters will reveal that they belong to different types, such as Resist 3D (R3D) and Mask 3D (M3D) sensitive structures, limiters related to OPC (Optical Proximity Corrections) options such as assist placement, or the choice of CD metrics and tolerances for calculation of the process windows itself. To guide this investigation, we will consider a ‘reference OPC’ case to be compared with other solutions. In addition, rigorous simulations and OPC verifications will complete the after-etch measurements to help us to validate our experimental findings.

Litho1-litho2 proximity differences for LELE and LPLE double patterning processes

Double Patterning (DP) is the most immediate lithography candidate for IC technologies requiring pitches below the single exposure capabilities of todays ArF immersion scanners. Litho-Process-Litho-Etch (LPLE) double patterning (DP) processes potentially offer substantial cost and throughput benefits over the more proven Litho-Etch-Litho-Etch (LELE) approaches. However, LPLE DP approaches typically use a different resist for each lithography step and there are many potential process and material interactions between the lithographic layers which could have an impact on proximity effects after full DP flow. In this work the impact of process and material interactions on proximity effects is investigated for a metal 1 double trench LELE process and a poly double line LPLE process. The process windows for several pitches and proximity behaviour of both pattern 1 and pattern 2 is studied. Results obtained from a single patterned wafer are compared with results from a single patterned and double patterned area on a double patterned wafer. The results reveal that for the LPLE case there are process window and proximity differences between single and double patterned wafers showing the influence of a neighbouring line from another patterning step. The process window differences do not just consist of a simple shift along the dose axis. For a few specific cases the experimental results are compared to calibrated LPL Prolith model predictions. The Prolith simulation model matches the experimental data and helps to distinguish between chemical, optical and processing effects as the root cause of the observed differences.

Model calibration and validation for pre-production EUVL

As Extreme Ultraviolet Lithography (EUVL) enters the pre-production phase, the need to qualify the Electronic Design Automation (EDA) infrastructure is pressing. In fact, it is clear that EUV will require optical proximity correction (OPC), having its introduction shifted to more advanced technology nodes. The introduction of off-axis illumination will enlarge the optical proximity effects, and EUV-specific effects such as flare and shadowing have to be fully integrated in the correction flow and tested. We have performed a model calibration exercise on the ASML NXE:3100 pre-production EUVL scanner using Brions Tachyon NXE EUV system. A model calibration mask has been designed, manufactured and characterized. The mask has different flare levels, as well as model calibration structures through CDs and pitch. The flare modulation through the mask is obtained by varying tiling densities. The generation of full-chip flare maps has been qualified against experimental results. The model was set up and calibrated on an intermediate flare level, and validated in the full flare range. Wafer data have been collected and were used as input for model calibration and validation. Two-dimensional structures through CD and pitch were used for model calibration and verification. We discuss in detail the EUV model, and analyze its various components, with particular emphasis to EUV-specific phenomena such as flare and shadowing.

300 mm Wafer Development for Pattern Collapse Evaluations

Over the past decade, many advanced drying techniques have been developed to reduce and prevent pattern collapse of high aspect ratio (HAR) structures after wet processing. However, different dimensions, profiles and materials of HAR structures used in literature make it difficult to compare the efficiency of different drying processes. In this work, standard 300 mm wafer test structures, characterization and analysis techniques have been developed for quantitative analysis of pattern collapse rate as a function of the intrinsic mechanical property of HAR structures. Such standardized single wafer evaluations are important for benchmarking different drying techniques.

CD-SEM metrology and OPC modeling for 2D patterning in advanced technology nodes (Conference Presentation)

In the course of assessing OPC compact modeling capabilities and future requirements, we chose to investigate the interface between CD-SEM metrology methods and OPC modeling in some detail. Two linked observations motivated our study: 1) OPC modeling is, in principle, agnostic of metrology methods and best practice implementation. 2) Metrology teams across the industry use a wide variety of equipment, hardware settings, and image/data analysis methods to generate the large volumes of CD-SEM measurement data that are required for OPC in advanced technology nodes. Initial analyses led to the conclusion that many independent best practice metrology choices based on systematic study as well as accumulated institutional knowledge and experience can be reasonably made. Furthermore, these choices can result in substantial variations in measurement of otherwise identical model calibration and verification patterns. We will describe several experimental 2D test cases (i.e., metal, via/cut layers) that examine how systematic changes in metrology practice impact both the metrology data itself and the resulting full chip compact model behavior. Assessment of specific methodology choices will include: • CD-SEM hardware configurations and settings: these may range from SEM beam conditions (voltage, current, etc.,) to magnification, to frame integration optimizations that balance signal-to-noise vs. resist damage. • Image and measurement optimization: these may include choice of smoothing filters for noise suppression, threshold settings, etc. • Pattern measurement methodologies: these may include sampling strategies, CD- and contour- based approaches, and various strategies to optimize the measurement of complex 2D shapes. In addition, we will present conceptual frameworks and experimental methods that allow practitioners of OPC metrology to assess impacts of metrology best practice choices on model behavior. Finally, we will also assess requirements posed by node scaling on OPC model accuracy, and evaluate potential consequences for CD-SEM metrology capabilities and practices.

OPC resist model separability validation after SMO source change

Computational lithography has become indispensable when developing lithography solutions for advanced technology nodes. One of the essential instruments for optimizing full-chip process windows (PW) is source mask optimization (SMO). To avoid model calibration for each new optimized source, separable resist models need to be created such that a reliable model can be obtained simply by replacing the source in the existing OPC model. In this paper we start from a fully calibrated resist model and optimize a new source for which we want to create a reliable OPC model. Relying on the separability of the model, the initial illumination source is replaced by the new one while not changing any resist model parameters. In order to reach the accuracy needed for OPC, the best focus and best dose still need to be accurately determined. We will investigate two models that have the same new SMO source and original resist model. For one model the best focus and dose are determined by the simulated Bossung plot of one anchor feature. The second model’s best focus and exposure are determined by a small set of FEM experimental data. The quality of these two models is then evaluated by comparing them to a reference model, which is fully calibrated using a complete dataset for the new source. We show that the calibrated FEM OPC model can be extrapolated by simply changing the source. A limited amount of experimental FEM data is required to accurately determine the best focus and exposure for the new source. Best focus and exposure based on the anchor pattern simulation has a higher degree of uncertainty compared to a small set of experimental data.

Empirical study of OPC metrology requirements for 32-nm node logic

We evaluate the relationship between the number of measurements used to create each data point in an OPC model data set and resulting model quality for target 32-nm logic node applications. Generated data sets will range from singlemeasurement, unfiltered data sets to many-measurement averages based on filtered results. Intermediate measurementcount averages will also be evaluated in an attempt to quantify the tradeoff between raw measurements per data point and resulting model quality. Finally, other variations will also be considered, such as automated versus manual data filtering. The auto-fitted OPC models will be compared to identify metrology recommendations for 32-nm logic node modeling.

Analysis method to determine and characterize the mask mean-to-target and uniformity specification

The specification of the mask mean-to-target (MTT) and uniformity is related to functions as: mask error enhancement factor, dose sensitivity and critical dimension (CD) tolerances. The mask MTT shows a trade-off relationship with the uniformity. Simulations for the mask MTT and uniformity (M-U) are performed for LOGIC devices of 45 and 37 nm nodes according to mask type, illumination condition and illuminator polarization state. CD tolerances and after develop inspection (ADI) target CDs in the simulation are taken from the 2004 ITRS roadmap. The simulation results allow for much smaller tolerances in the uniformity and larger offsets in the MTT than the values as given in the ITRS table. Using the parameters in the ITRS table, the mask uniformity contributes to nearly 95% of total CDU budget for the 45 nm node, and is even larger than the CDU specification of the ITRS for the 37 nm node. We also compared the simulation requirements with the current mask making capabilities. The current mask manufacturing status of the mask uniformity is barely acceptable for the 45 nm node, but requires process improvements towards future nodes. In particular, for the 37 nm node, polarized illumination is necessary to meet the ITRS requirements. The current mask linearity deviates for pitches smaller than 300 nm, which is not acceptable even for the 45 nm node. More efforts on the proximity correction method are required to improve the linearity behavior.