Jhonathan P. Rojas

Vertically Grown Multiwalled Carbon Nanotube Anode and Nickel Silicide Integrated High Performance Microsized (1.25 μL) Microbial Fuel Cell

Microbial fuel cells (MFCs) are an environmentally friendly method for water purification and self-sustained electricity generation using microorganisms. Microsized MFCs can also be a useful power source for lab-on-a-chip and similar integrated devices. We fabricated a 1.25 μL microsized MFC containing an anode of vertically aligned, forest type multiwalled carbon nanotubes (MWCNTs) with a nickel silicide (NiSi) contact area that produced 197 mA/m(2) of current density and 392 mW/m(3) of power density. The MWCNTs increased the anode surface-to-volume ratio, which improved the ability of the microorganisms to couple and transfer electrons to the anode. The use of nickel silicide also helped to boost the output current by providing a low resistance contact area to more efficiently shuttle electrons from the anode out of the device.

Transformational Silicon Electronics

In todays traditional electronics such as in computers or in mobile phones, billions of high-performance, ultra-low-power devices are neatly integrated in extremely compact areas on rigid and brittle but low-cost bulk monocrystalline silicon (100) wafers. Ninety percent of global electronics are made up of silicon. Therefore, we have developed a generic low-cost regenerative batch fabrication process to transform such wafers full of devices into thin (5 μm), mechanically flexible, optically semitransparent silicon fabric with devices, then recycling the remaining wafer to generate multiple silicon fabric with chips and devices, ensuring low-cost and optimal utilization of the whole substrate. We show monocrystalline, amorphous, and polycrystalline silicon and silicon dioxide fabric, all from low-cost bulk silicon (100) wafers with the semiconductor industrys most advanced high-κ/metal gate stack based high-performance, ultra-low-power capacitors, field effect transistors, energy harvesters, and storage to emphasize the effectiveness and versatility of this process to transform traditional electronics into flexible and semitransparent ones for multipurpose applications.

Can We Build a Truly High Performance Computer Which is Flexible and Transparent

State-of-the art computers need high performance transistors, which consume ultra-low power resulting in longer battery lifetime. Billions of transistors are integrated neatly using matured silicon fabrication process to maintain the performance per cost advantage. In that context, low-cost mono-crystalline bulk silicon (100) based high performance transistors are considered as the heart of todays computers. One limitation is silicons rigidity and brittleness. Here we show a generic batch process to convert high performance silicon electronics into flexible and semi-transparent one while retaining its performance, process compatibility, integration density and cost. We demonstrate high-k/metal gate stack based p-type metal oxide semiconductor field effect transistors on 4 inch silicon fabric released from bulk silicon (100) wafers with sub-threshold swing of 80 mV dec−1 and on/off ratio of near 104 within 10% device uniformity with a minimum bending radius of 5 mm and an average transmittance of ~7% in the visible spectrum.

Flexible and Semi‐Transparent Thermoelectric Energy Harvesters from Low Cost Bulk Silicon (100)

Silicon electronics are at the heart of today’s digital world. Silicon based micro-fabrication technology has unparalleled performance, cost, and yield advantages. However, silicon is brittle and cannot be used for many healthcare and electronic applications. Most living organs are intrinsically of irregular shapes and thus medical electronics intended for implantation on host features such as eye balls or ears need to be fl exible. [ 1 ] Therefore, exploration for a low-cost, simple solution using plastic as substrate and organic materials to fabricate fl exible electronics, like displays and sensors, is on the rise. [ 2–5 ] The basic challenges associated with fl exible electronics compared to precision silicon technology are high thermal budget process incompatibility and inherently low electron mobility. [ 6 ] These two major challenges hinder their potential to integrate high performance devices on a traditional plastic based fl exible platform. With increased world population and concerns about health care, it is important to develop technologies which will be integrated in a benign way to humans or garments capable of collecting and transmitting necessary real-time data to address issues like seizure, heart attacks, etc. [ 7 ] This means high performance silicon-based transistors are required to be implemented on fl exible platforms. Simultaneously, such systems would require ultralow power consumption sourced conveniently from the surrounding environment. Thermoelectric energy harvesters (generators or TEGs) are one of the most pragmatic options to serve as a mobile power source. [ 8 ] Some micrometer-sized TEGs are even commercially available. [ 9–11 ] A few efforts have been made to fabricate them on fl exible substrates like polymide sheet and SU-8 based polymers. [ 12–15 ] Major challenges with these materials are (i) their low melting point making them incompatible for high temperature operation; (ii) their incompatibility for thick fi lm deposition using electrochemical deposition and iii) due to low thermal conductivity ( < 1 W/mK), the temperature cannot drop across the thermocouples. Energy harvesters like TEGs have not

Silicon Nanotube Field Effect Transistor with Core–Shell Gate Stacks for Enhanced High-Performance Operation and Area Scaling Benefits

We introduce the concept of a silicon nanotube field effect transistor whose unique core-shell gate stacks help achieve full volume inversion by giving a surge in minority carrier concentration in the near vicinity of the ultrathin channel and at the same time rapid roll-off at the source and drain junctions constituting velocity saturation-induced higher drive current-enhanced high performance per device with efficient real estate consumption. The core-shell gate stacks also provide superior short channel effects control than classical planar metal oxide semiconductor field effect transistor (MOSFET) and gate-all-around nanowire FET. The proposed device offers the true potential to be an ideal blend for quantum ballistic transport study of device property control by bottom-up approach and high-density integration compatibility using top-down state-of-the-art complementary metal oxide semiconductor flow.

Structural and electrical characteristics of high-k/metal gate metal oxide semiconductor capacitors fabricated on flexible, semi-transparent silicon (100) fabric

In pursuit of flexible computers with high performance devices, we demonstrate a generic process to fabricate 10 000 metal-oxide-semiconductor capacitors (MOSCAPs) with semiconductor industrys most advanced high-k/metal gate stacks on widely used, inexpensive bulk silicon (100) wafers and then using a combination of iso-/anisotropic etching to release the top portion of the silicon with the already fabricated devices as a mechanically flexible (bending curvature of 133 m−1), optically semi-transparent silicon fabric (1.5 cm × 3 cm × 25 μm). The electrical characteristics show 3.7 nm effective oxide thickness, −0.2 V flat band voltage, and no hysteresis from the fabricated MOSCAPs.

Flexible nanoscale high-performance FinFETs.

With the emergence of the Internet of Things (IoT), flexible high-performance nanoscale electronics are more desired. At the moment, FinFET is the most advanced transistor architecture used in the state-of-the-art microprocessors. Therefore, we show a soft-etch based substrate thinning process to transform silicon-on-insulator (SOI) based nanoscale FinFET into flexible FinFET and then conduct comprehensive electrical characterization under various bending conditions to understand its electrical performance. Our study shows that back-etch based substrate thinning process is gentler than traditional abrasive back-grinding process; it can attain ultraflexibility and the electrical characteristics of the flexible nanoscale FinFET show no performance degradation compared to its rigid bulk counterpart indicating its readiness to be used for flexible high-performance electronics.

Flexible High-

Implementation of memory on bendable substrates is an important step toward a complete and fully developed notion of mechanically flexible computational systems. In this paper, we have demonstrated a simple fabrication flow to build metal-insulator-metal capacitors, key components of dynamic random access memory, on a mechanically flexible silicon (100) fabric. We rely on standard microfabrication processes to release a thin sheet of bendable silicon (area: 18 cm2 and thickness: 25 μm) in an inexpensive and reliable way. On such platform, we fabricated and characterized the devices showing mechanical robustness (minimum bending radius of 10 mm at an applied strain of 83.33% and nominal strain of 0.125%) and consistent electrical behavior regardless of the applied mechanical stress. Furthermore, and for the first time, we performed a reliability study suggesting no significant difference in performance and showing an improvement in lifetime projections.

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Stretchable electronic systems can play instrumental role for reconfigurable macro-electronics such as distributed sensor networks for wearable and bio-integrated electronics. Typically, polymer composite based materials and its deterministic design as interconnects are used to achieve such systems. Nonetheless, non-polymeric inorganic silicon is the predominant material for 90% of electronics. Therefore, we report the design and fabrication of an all silicon based network of hexagonal islands connected through spiral springs to form an ultra-stretchable arrangement for complete compliance to highly asymmetric shapes. Several design parameters are considered and their validation is carried out through finite element analysis. The fabrication process is based on conventional microfabrication techniques and the measured stretchability is more than 1000% for single spirals and area expansions as high as 30 folds in arrays. The reported method can provide ultra-stretchable and adaptable electronic systems for distributed network of high-performance macro-electronics especially useful for wearable electronics and bio-integrated devices.

/Metal Gate Metal/Insulator/Metal Capacitors on Silicon (100) Fabric

The ability to incorporate rigid but high-performance nanoscale nonplanar complementary metal-oxide semiconductor (CMOS) electronics with curvilinear, irregular, or asymmetric shapes and surfaces is an arduous but timely challenge in enabling the production of wearable electronics with an in situ information-processing ability in the digital world. Therefore, we are demonstrating a soft-material enabled double-transfer-based process to integrate flexible, silicon-based, nanoscale, nonplanar, fin-shaped field effect transistors (FinFETs) and planar metal-oxide-semiconductor field effect transistors (MOSFETs) on various asymmetric surfaces to study their compatibility and enhanced applicability in various emerging fields. FinFET devices feature sub-20 nm dimensions and state-of-the-art, high-κ/metal gate stacks, showing no performance alteration after the transfer process. A further analysis of the transferred MOSFET devices, featuring 1 μm gate length, exhibits an ION value of nearly 70 μA/μm (VDS = 2 V, VGS = 2 V) and a low subthreshold swing of around 90 mV/dec, proving that a soft interfacial material can act both as a strong adhesion/interposing layer between devices and final substrate as well as a means to reduce strain, which ultimately helps maintain the devices performance with insignificant deterioration even at a high bending state.