Jingxin Jiang

Highly stable fluorine-passivated In–Ga–Zn–O thin-film transistors under positive gate bias and temperature stress

A highly stable fluorine-passivated In–Ga–Zn–O (IGZO) thin-film transistor (TFT) was demonstrated under positive gate bias and temperature stress (PBTS). The defects in the IGZO TFT were passivated by fluorine, which was introduced into a SiOx etching stopper during the deposition of fluorinated silicon nitride for passivation and diffused during post-fabrication annealing. From the results of secondary ion mass spectrometry analysis, the reliability of the IGZO TFT under PBTS was observed to be markedly improved even at a stress temperature of 100 °C when fluorine diffusion was detected in the IGZO channel. The fluorine-passivated IGZO TFT has improved operation temperature and is advantageous for achieving high-performance and high-reliability oxide TFTs for next-generation displays.

Self-Aligned Bottom-Gate In—Ga—Zn—O Thin-Film Transistor With Source/Drain Regions Formed by Direct Deposition of Fluorinated Silicon Nitride

We developed a bottom-gate and self-aligned In-Ga-Zn-O thin-film transistor (IGZO TFT) with source and drain (S/D) regions that were formed by a direct deposition of fluorinated silicon nitride (SiNx:F) on top of the IGZO film (IGZO/SiNx:F). The resistivity of IGZO/SiN_x:F stack for the S/D regions of the TFT (ρS/D) was highly stable after annealing, and it obtained 4.1 × 10^-3 Qcm after N₂ annealing at 350°C. As a result of thermally stable ρ_S/D, the TFT properties with the IGZO/SiN_x:F S/D regions improved drastically compared with those of IGZO/SiO_x S/D regions. The field effect mobility of 10.6 cm²·V^-1·s-1 and an ON/OFF current ratio of over 10⁸ were obtained after 300°C annealing. The proposed method is essential for making thermally stable S/D regions for self-aligned oxide TFTs.

Suppression of Degradation Induced by Negative Gate Bias and Illumination Stress in Amorphous InGaZnO Thin-Film Transistors by Applying Negative Drain Bias

The effect of drain bias (V(DS)) on the negative gate bias and illumination stress (NBIS) stability of amorphous InGaZnO (a-IGZO) thin-film transistors was investigated using a double-sweeping gate voltage (V(GS)) mode. The variation in the transfer characteristics was explored using current-voltage and capacitance-voltage characteristics. In the initial stage (<1000 s) of NBIS with grounded V(DS) (V(GS) = -40 V and V(DS) = 0 V), the transfer characteristics shifted negatively with an insignificant change in the subthreshold swing (SS) because of hole trapping at an IGZO/gate insulator interface. On the other hand, on-current degradation was observed and was accelerated in the forward measurement as the NBIS duration increased. The results indicated that NBIS induced donor-like defects near the conduction band; however, the transfer curves in the reverse measurement shifted positively without on-current and SS degradations. It was found that the degradations were enhanced by applying a positive V(DS) bias (V(GS) = -40 V and V(DS) = 40 V); in contrast, they could be reduced by applying a small negative V(DS) of V(DS) > V(GS) (V(GS) = -40 V and V(DS) = -20 V). Furthermore, it was confirmed that the NBIS degradations could be suppressed by applying a large negative V(DS) bias of V(DS) < V(GS) (V(GS) = -40 V and V(DS) = -60 V) during NBIS.

Suppression of positive gate bias temperature stress and negative gate bias illumination stress induced degradations by fluorine-passivated In-Ga-Zn-O thin-film transistors

High-performance and highly-stable fluorine-passivated In-Ga-Zn-O (IGZO) thin-film transistor (TFT) was demonstrated by the formation of a fluorinated silicon nitride (SiNx:F) passivation layer. After annealing at 350 °C for 3 h, the IGZO TFT exhibited the great electrical properties, such as a field-effect mobility of 14.7 cm2 V-1 s-1, a subthreshold swing of 0.19, and a hysteresis of 0.02 V. Compare to the TFT with SiOx passivation, the reliability of TFT with SiNx:F passivation under positive gate bias temperature stress (PBTS) was significantly improved even at a stress temperature of 100 °C. In addition, the negative gate bias illumination stress (NBIS), which is a serious drawback for oxide TFTs, could be suppressed by the fluorine-passivated IGZO TFT.

Thermally stable n + -InGaZnO layer stacked by fluorinated silicon nitride for self-aligned thin-film transistor application

Thermal stability of amorphous InGaZnO (a-IGZO) film stacked by fluorinated silicon nitride (SiN_x:F) was investigated. The electrical properties of stacked a-IGZO, including the resistivity of ~4.0 × 10^-3 Ω-cm, the carrier concentration of ~10²⁰ cm^-3, and Hall mobility of ~19.0 cm²/Vs, showed highly thermally stable irrespective of annealing temperature. On the basis of this phenomenon, a novel bottom-gate and self-aligned IGZO TFT combined the back-side exposure technique with directly stacked IGZO/SiN_x:F layers in the S/D regions was fabricated. The proposed a-IGZO TFT exhibits good electrical characteristics and highly thermal stability even annealing as high as 350 °C.