João Costa Freire

Low noise monolithic down converter for a L band mobile hand set terminal

We report on a 3V monolithic RF front end receiver at 2GHz for a mobile hand set terminal with a two stages LNA, a down converter in a cascode configuration and an output common drain stage. This receiver achieves a maximum conversion gain of 38dB and a minimum noise figure of 2.7dB. This performance was obtained with a low cost MESFET technology with a 0.5¿m gate length process.

A 130 nm CMOS LNA for 30 GHz applications

This paper presents the design of a 30 GHz low noise amplifier in a 130 nm CMOS technology. The amplifier is based on a cascode topology. The circuit uses autotransformers in the input and output matching networks. This design approach eliminates the necessity of the use of source degeneration and allows obtaining an ultra compact LNA. The amplifier presents a forward gain (S21) of 7.4 dB at 30 GHz with a bandwidth of 10 GHz, input and output VSWRs better than 1.22:1 and a noise figure of 3.7 dB. The LNA is unconditionally stable and consumes only 7 mW when supplied with 1.2 V. The amplifier fits an area of 0.08 mm2, which is one of the smallest areas reported.

SiGe 30GHz active inductor based on cascode gyrator

A monolithic active inductor, to be used up to millimetre wave band lower edge, 30GHz, was implemented with a SiGe technology with 4 metal layers and HBTs with fT=120 GHz. The inductor has a Q greater then 30 on a 4.5GHz bandwidth. The inductance value can be as high as InH. Adjusting the bias conditions an inductance variation over 50% was measured.

Gain compression improvement on low-power cascaded current reuse LNAs

Current reuse low-noise-amplifiers CRLNAs have been the norm to achieve high-gain and low-noise figure under low-power budgets. However, conventional CRLNAs suffer from a severe lack of large-signal linearity, especially in conventional cascaded CRLNAs. This main drawback is related with the typical biasing method imposed in the output stage. To prove our point, a large-signal study is performed for a single stage common-source in two distinct biasing situations: voltage biased and current biased. On the basis of the gathered results, a new CRLNA solution is proposed to relief the large-signal bottleneck. The suggested design is analyzed in a 0.13µm complementary metal-oxide-semiconductor CMOS standard process. Post-layout simulations show 8dB compression point improvement compared with the conventional CRLNA solution. The CRLNA draws a current of 650µA from a 1.2V supply. At 2.45GHz, a power gain of 25.3dB and a NF of 2.3dB are achieved, while the IIP3 is -9dBm. Copyright

30GHz Amplifiers with 0.25μm SiGe BiCMOS

In this paper the possibility of using a low cost SiGe:C BiCMOS technology dedicated to few GHz applications up to 30 GHz is discussed. Spiral inductors with SRF higher than 30 GHz, are not available at the foundry library. Accordingly, inductors with a SRF higher than 45 GHz were obtained, however their Q is only 5 at 30 GHz. The test and modeling technique is presented. The design, implementation and test of a two stages common emitter amplifier without inductors are also presented. It has a 8 dB gain at 28 GHz and 1 dB bandwidth from 5 to 10 GHz with a maximum gain of 23 dB (best frequency range for this technology). The return losses are better then 10 dB from 10 to 35 GHz.

A Microstrip Matching Network for Class C Power Amplifiers Optimization

The effect of second harmonic reactive termination on the performance of an UHF class C amplifier will be presented. A matching network that leads to an easy amplifier design for microstrip implementation will be described. With this network we can vary the fundamental and the second harmonic load impedance of the amplifier independently. With this circuit, significant improvements in the performance of a class C power amplifier were achieved by presenting proper values of second harmonic reactive load at the output of the transistor. Two experimental, hybrid prototypes with encapsulated discrete transistors were designed, mounted and tested to validate the design technique.

MMIC Chip-on-Board for wireless communications

We report on the design and Chip-on-Board integration of a monolithic microwave LNA (low noise amplifier) with a monolithic microwave mixer for a mobile L band receiver front- end. GaAs MESFET process with 0.5 micrometer gate length devices was used for the MMICs fabrication. Both MMICs were tested on-wafer and mounted on a soft substrate microstrip carrier (Chip on Board). Experiments are presented.

MESFETs modelling for an optimum saturated class A MMIC power amplifier design

This paper describes the modeling of a 0.5 /spl mu/m gate length GaAs MESFET using different models (Tajima and Curtice Cubic) and different experimental characterization techniques (pulsed and continuous). The models characteristics are compared with experiments. Discussion on the best modeling approach for the design of saturated class A power amplifiers is presented. For this purpose we have designed and tested a 3 V bias, 100 mW output power at 2 GHz monolithic power amplifier. All matching and bias elements are on-chip. The matching networks topology and design take into account the fabrication dispersion.

Double-balanced single-side band mixer for millimeter wave mobile communications

In this paper the design of single side band mixers to convert C to V band signals is presented. A step by step design technique, based on harmonic balance simulations is described. The mixer devices are Schottky diodes compatible with a GaAs MESFET technology. The mixers were optimized for minimum conversion loss over the widest possible bandwidth when used as both up or downconverters in order to be used on a large number of applications. The experiments show, for both applications, a minimum conversion loss in the range of 8 to 9dB and a 3dB bandwidth larger than 6GHz.

Multifunction MMIC for millimeter wave mobile communications

In this paper the design of a multifunction MMIC for millimeter wave mobile communication systems is presented. The MMIC is a single balanced mixer that can work as both up and down converter between C and V band and as a BPSK modulator. A step by step design technique is described, based on harmonic balance simulations. The mixer devices are Schottky diodes, and all the components are integrated in a MMIC chip using GaAs MESFET technology. The mixers were optimized to have a similar performance as both up or down converter, between C and V bands and a bandwidth greater than 4 GHz. The experiments show, for both applications a minimum conversion loss in the range of 6 to 8 dB and a -3dB bandwidth larger than 7 GHz.