João P. Oliveira

On the Mechanisms for Martensite Formation in YAG Laser Welded Austenitic NiTi

Extensive work has been reported on the microstructure of laser-welded NiTi alloys either superelastic or with shape memory effect, motivated by the fact that the microstructure affects the functional properties. However, some effects of laser beam/material interaction with these alloys have not yet been discussed. This paper aims to discuss the mechanisms for the occurrence of martensite in the heat-affected zone and in the fusion zone at room temperature, while the base material is fully austenitic. For this purpose, synchrotron radiation was used together with a simple thermal analytic mathematical model. Two distinct mechanisms are proposed for the presence of martensite in different zones of a weld, which affects the mechanical and functional behavior of a welded component.

Shape memory effect of laser welded NiTi plates

Laser welding is a suitable joining technique for shape memory alloys (SMAs). This paper reports the existence of shape memory effect (SME) on laser welded NiTi joints, subjected to bending tests, and correlates this effect with the microstructural analysis performed with X-ray diffraction (XRD). All welded samples were able to recover their initial shape after bending to 180°, which is a remarkable result for industrial applications of NiTi involving laser welding.

A 1.2-V 165-/spl mu/W 0.29-mm 2 Multibit Sigma-Delta ADC for Hearing Aids Using Nonlinear DACs and With Over 91 dB Dynamic-Range

This paper describes the design and experimental evaluation of a multibit Sigma-Delta (ΣΔ) modulator (ΣΔM) with enhanced dynamic range (DR) through the use of nonlinear digital-to-analog converters (DACs) in the feedback paths. This nonlinearity imposes a trade-off between DR and distortion, which is well suited to the intended hearing aid application. The modulator proposed here uses a fully-differential self-biased amplifier and a 4-bit quantizer based on fully dynamic comparators employing MOS parametric pre-amplification to improve both energy and area efficiencies. A test chip was fabricated in a 130 nm digital CMOS technology, which includes the proposed modulator with nonlinear DACs and a modulator with conventional linear DACs, for comparison purposes. The measured results show that the ΣΔM using nonlinear DACs achieves an enhancement of the DR around 8.4 dB (to 91.4 dB). Power dissipation and silicon area are about the same for the two cases. The performance achieved is comparable to that of the best reported multibit ΣΔ ADCs, with the advantage of occupying less silicon area (7.5 times lower area when compared with the most energy efficient ΣΔM).

Low-Power CMOS Comparator with Embedded Amplification for Ultra-high-speed ADCs

In this paper the challenge of improving the energy-efficiency of comparators is addressed, by proposing a novel comparator structure, to be used in ultra-high-speed ADCs. In this comparator, the pre-amplification is embedded in the input switched-capacitor network by using the passive-amplification capability of MOS devices. Simulated results show that this comparator exhibits low-offset ultra-fast regeneration-time and high energy-efficiency.

Balun LNA with continuously controllable gain and with noise and distortion cancellation

In this paper we present a balun LNA with gain adjustable continuously by a voltage. The LNA is based on the combination of a common-gate and a common-source stage to cancel the noise and distortion of the common-gate stage. To obtain higher gain with the same DC voltage drop we replace resistors by PMOS transistors. This also allows continuous gain control and we show that by proper design, the effect on IIP3 and IIP2 can be neglected. With this approach, we avoid the use of switches, and the input impedance and the noise figure are not affected. Simulation results with a 130 nm CMOS technology show that the balun LNA has gain continuously tunable between 12 and 20 dB. The NF is below than 3.2 dB and the best IIP3 is higher than 0 dBm and the maximum IIP2 is 14 dBm. The total power dissipation is only 4.8 mW for a bandwidth of 5 GHz.

An 8-bit 120-MS/s Interleaved CMOS Pipeline ADC Based on MOS Parametric Amplification

This brief presents an 8-bit 120-MS/s time-interleaved pipeline analog-to-digital converter (ADC) fully based on MOS discrete-time parametric amplification. The ADC, fabricated in a 130-nm CMOS logic process, features an active area below 0.12 mm2, where only MOS devices are used. Measurement results for a 20-MHz input signal shows that the ADC achieves 39.7 dB of signal-to-noise ratio, 49.3 dB of spurious-free dynamic range, -47.5 dB of total harmonic distortion, 39.1 dB of signal-to-noise-plus-distortion ratio, and 6.2 bits of peak effective number of bits while consuming less than 14 mW from a 1.2-V supply.

Optimization of multi-stage amplifiers in deep-submicron CMOS using a distributed/parallel genetic algorithm

This paper presents a framework for time-domain optimization of amplifiers employing a parallel genetic algorithm based on a message passing interface. This methodology achieves a considerable reduction in the optimization time (up to 19 times faster than a serial implementation). Increasing the processing capacity allows searching within a larger design space using complex transistors models, yielding more accurate results. The optimization, based on transient simulations, is possible due to the integration of a genetic algorithm optimizer together with the open-source simulator NGSPICE source-code.

Laser welding of NiTi shape memory alloy wires and tubes for multi-functional design applications

Welding and joining of NiTi shape memory alloys is essential for their integration into an increasing variety of applications. Almost all manufacturers and a significant number of researchers focus their investigation on welding NiTi, which can present both pseudoelasticity (PE) and shape memory effect. Integration of these materials would provide increased flexibility in terms of smart design, in particular for multi-functional systems. The current work investigates the mechanical, physical and phase transformation properties of similar (base materials (BMs) with the same composition) and dissimilar (BMs with different compositions) NiTi welded shape memory wires. The similar and dissimilar welded joints were successfully achieved by laser welding, which can reach up to 88.4% and 67.5% of the wire BM ductility. The joint break force of the similar and dissimilar joints were of 77.2% and 71.4% of the wire BM, respectively. Moreover, laser welding was found to effectively preserve the PE on the similar welded structures. The residual plastic strain variation of the dissimilar welded specimens at different temperatures during the cycling test may be helpful for design of multi-functional or flexible monolithic structures.

Tungsten inert gas (TIG) welding of Ni-rich NiTi plates: functional behavior

It is often reported that, to successfully join NiTi shape memory alloys, fusion-based processes with reduced thermal affected regions (as in laser welding) are required. This paper describes an experimental study performed on the tungsten inert gas (TIG) welding of 1.5 mm thick plates of Ni-rich NiTi. The functional behavior of the joints was assessed. The superelasticity was analyzed by cycling tests at maximum imposed strains of 4, 8 and 12% and for a total of 600 cycles, without rupture. The superelastic plateau was observed, in the stress–strain curves, 30 MPa below that of the base material. Shape-memory effect was evidenced by bending tests with full recovery of the initial shape of the welded joints. In parallel, uniaxial tensile tests of the joints showed a tensile strength of 700 MPa and an elongation to rupture of 20%. The elongation is the highest reported for fusion-welding of NiTi, including laser welding. These results can be of great interest for the wide-spread inclusion of NiTi in complex shaped components requiring welding, since TIG is not an expensive process and is simple to operate and implement in industrial environments.

Improved Low-Power Low-Voltage CMOS Comparator for 4-Bit Flash ADCS for UWB Applications

In this paper we propose a novel comparator structure, to be used in low-resolution ultra-high-speed ADCs that improve the energy-efficiency. In this comparator, the pre-amplification is embedded in the input switched-capacitor network by using the passive-amplification capability of MOS devices. Simulated results show that this comparator exhibits low-offset ultra-fast regeneration-time and high energy-efficiency.