Jody A. Fronheiser

A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels

We present a 7nm technology with the tightest contacted poly pitch (CPP) of 44/48nm and metallization pitch of 36nm ever reported in FinFET technology. To overcome optical lithography limits, Extreme Ultraviolet Lithography (EUV) has been introduced for multiple critical levels for the first time. Dual strained channels have been also implemented to enhance mobility for high performance applications.

Mueller based scatterometry measurement of nanoscale structures with anisotropic in-plane optical properties

The uses of strained channel became prevalent at the 65 nm node and have continued to be a large part of logic device performance improvements in every technology generation. These material and integration innovations will continue to be important in sub-22nm devices, and are already being applied in finFET devices where total available in-channel strains are potentially higher. The measurement of structures containing these materials is complicated by the intrinsic correlation of the measured optical thickness and variation of optical properties with strain, as well as the dramatic reduction in total volume of the device. Optical scatterometry has enabled characterization of the feature shape and dimensions of complex 3D structures, including non-planar transistors and memory structures. Ellipsometric methods have been successfully applied to the measurement of thin films of SiGe and related strained structures. A direction for research is validating that the thin film stress results can be extended into the much more physically complex 3D shape. There are clear challenges in this: the stress in a SiGe fin is constrained to match the underlying Si along one axis, but the sides and top are free, leading to very large strain gradients both along the fin width and height. Practical utilization of optical techniques as a development tool is often limited by the complexity of the scatterometry model and setup, and this added material complexity presents a new challenge. In this study, generalized spectroscopic ellipsometric measurements of strained grating was undertaken, in parallel with reference cross sectional and top down SEM data. The measurements were modeled for both anisotropy calculations, as well as full scatterometry calculations, fitting the strain and structure. The degree to which strain and CD can be quickly quantified in an optical model is discussed. Sum decomposition method has been implemented to extract the effective anisotropic coefficients and a discussion on the effect of anisotropy toward modeling is presented. Finally, errors in the scatterometry measurement are analyzed, and the relative strengths and limitations of these optical measurements compared.

FINFET technology featuring high mobility SiGe channel for 10nm and beyond

SiGe for channel material has been explored as a major technology element after the introduction of FINFET into CMOS technology [1-4]. Research on long channel FETs and discrete short channel FETs demonstrated benefits in mobility [1-4] and reliability [2]. Given the disruption that SiGe FIN brings, every aspect associated with SiGe FIN needs to be carefully studied towards technology insertion. In this paper, we report the latest SiGe-based FINFET CMOS technology development. CMOS FINFETs with Si-FIN nFET and SiGe-FIN pFET is demonstrated as a viable technology solution for both server and mobile applications at 10nm node and beyond.

Measurement of periodicity and strain in arrays of single crystal silicon and pseudomorphic Si1−xGex/Si fin structures using x-ray reciprocal space maps

College of Nanoscale Science and Engineering, SUNY, New York 12203 GLOBALFOUNDRIES, Albany, New York 12203 Jordan Valley Semiconductors Inc., 3913 Todd Lane, Suite 106, Austin, Texas 78744 Advanced Photon Source, Argonne National Laboratory, 9700S Cass Ave., Argonne, Illinois 60439

Assessment of critical dimension small-angle x-ray scattering measurement approaches for FinFET fabrication process monitoring

Abstract. We have used synchrotron-based critical dimension small-angle x-ray scattering (CD-SAXS) to monitor the impact of hydrogen annealing on the structural characteristics of silicon FinFET structures fabricated using self-aligned double patterning on both bulk silicon and silicon-on-insulator (SOI) substrates. H2 annealing under different conditions of temperature and gas pressure allowed us to vary the sidewall roughness and observe the response in the two metrology approaches. In the case of the simpler bulk Si FinFET structures, the CD-SAXS measurements of the critical dimensions are in substantive agreement with the top–down critical dimension scanning electron microscopy metrology. Corresponding characterizations on SOI-based FinFET structures showed less agreement, which is attributed to the more complex structural model required for SOI FinFET CD-SAXS modeling. Because sidewall roughness is an important factor in the performance characteristics of Si FinFETs, we have compared the results of roughness measurements using both critical dimension atomic force microscopy (CD-AFM) and CD-SAXS. The measurements yield similar estimates of sidewall roughness, although the CD-AFM values were typically larger than those generated by CD-SAXS. The reasons for these differences will be discussed.

Sub-

We report record low 8.4 × 10^-10 Ω-cm² n-type S/D contact resistivity with laser-induced solid/liquid phase epitaxy of Si:P inside nano-scale contact trenches. Significant reduction of device resistance and resultant great gain of drain current has been demonstrated in scaled n-FinFETs with a contact length of 20 nm.

10^{-9}~\Omega

Although fin metrology presents many challenges, the single crystal nature of the fins also provides opportunities to use a combination of measurement methods to determine stress and pitch. While the diffraction of light during a scatterometry measurement is well known, X-ray diffraction from a field (array) of single crystal silicon fins can also provide important information. Since some fins have Si1-xGex alloys at the top of the fin, determination of the presence of stress relaxation is another critical aspect of fin characterization. Theoretical studies predict that the bi-axially stressed crystal structure of pseudomorphic alloy films will be altered by the fin structure. For example, one expects it will be different along the length of the fin vs the width. Reciprocal space map (RSM) characterization can provide a window in the stress state of fins as well as measure pitch walking and other structural information. In this paper, we describe the fundamentals of how RSMs can be used to characterize the pitch of an array of fins as well as the stress state. We describe how this impacts the optical properties used in scatterometry measurement.

-cm2 n-Type Contact Resistivity for FinFET Technology

We achieved mid-10⁻¹⁰ Ω-cm² n-type S/D contact resistivity (npc) and 1.9×10⁻⁹ Ω-cm² p-type S/D contact resistivity (ppc) by employing laser-induced liquid or solid phase epitaxy (LPE/SPE) of Si:P and Ge:Group-III-Metal metastable alloys inside nano-scale contact trenches. The Ge: Group-III-Metal alloy allows for a metal-Ge Fermi level pinning effect to lower Schottky barrier height (SBH) while reducing both bulk and unipolar heterojunction resistances. Correspondingly, large Ron reduction and Id gain have been realized in scaled n- and p-FinFETs with the contact length of less than 20nm.

Fin Stress and Pitch Measurement using X-ray Diffraction Reciprocal Space Maps and Optical Scatterometry

The semiconductor industry continues to drive patterning solutions that enable devices with higher memory storage capacity, faster computing performance, and lower cost per transistor. These developments in the field of semiconductor manufacturing along with the overall minimization of the size of transistors require continuous development of metrology tools used for characterization of these complex 3D device architectures. Optical scatterometry or optical critical dimension (OCD) is one of the most prevalent inline metrology techniques in semiconductor manufacturing because it is a quick, precise and non-destructive metrology technique. However, at present OCD is predominantly used to measure the feature dimensions such as line-width, height, side-wall angle, etc. of the patterned nano structures. Use of optical scatterometry for characterizing defects such as pitch-walking, overlay, line edge roughness, etc. is fairly limited. Inspection of process induced abnormalities is a fundamental part of process yield improvement. It provides process engineers with important information about process errors, and consequently helps optimize materials and process parameters. Scatterometry is an averaging technique and extending it to measure the position of local process induced defectivity and feature-to-feature variation is extremely challenging. This report is an overview of applications and benefits of using optical scatterometry for characterizing defects such as pitch-walking, overlay and fin bending for advanced technology nodes beyond 7nm. Currently, the optical scatterometry is based on conventional spectroscopic ellipsometry and spectroscopic reflectometry measurements, but generalized ellipsometry or Mueller matrix spectroscopic ellipsometry data provides important, additional information about complex structures that exhibit anisotropy and depolarization effects. In addition the symmetry-antisymmetry properties associated with Mueller matrix (MM) elements provide an excellent means of measuring asymmetry present in the structure. The useful additional information as well as symmetry-antisymmetry properties of MM elements is used to characterize fin bending, overlay defects and design improvements in the OCD test structures are used to boost OCDs’ sensitivity to pitch-walking. In addition, the validity of the OCD based results is established by comparing the results to the top down critical dimensionscanning electron microscope (CD-SEM) and cross-sectional transmission electron microscope (TEM) images.

FinFET performance with Si:P and Ge:Group-III-Metal metastable contact trench alloys

Low Ge content SiGe-based CMOS FinFET is one of the promising technologies [1-2] offering solutions for both high performance and low power applications. In this paper, we established a competitive SiGe-based CMOS FinFET baseline and examined various elements for high performance offering. The performance elements in gate stack, channel doping, contact resistance, and junction have been explored to provide a cumulative 20% / 25% (n/pFET) performance enhancement. These elements provide a viable path towards performance enhancement for future technology nodes.