Joerg Thiele
Infineon Technologies
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Featured researches published by Joerg Thiele.
20th Annual BACUS Symposium on Photomask Technology | 2001
Martin Keck; Wolfram Ziegler; Roman Liebe; Torsten Franke; Gerd Ballhorn; Matthias Koefferlein; Joerg Thiele
By approaching the physical resolution limits of optical lithography for a given wavelength, data complexity on certain layers of chip layouts increases, while feature sizes decrease. This becomes even more apparent when introducing optical enhancement techniques. At the same time, more and more complex procedures to fracture mask data out of a DRC clean chip-GDS2 require checks on mask data regarding integrity, as well as mask manufacturability and inspectability. To avoid expensive redesigns and large mask house cycle times it is important to find shortcomings before the data are submitted to the mask house. As an approach to the situation depicted, a (Mask) Manufacturing Rule Check (MRC) can be introduced. Aggressive Optical Proximity Correction (OPC) is a special challenge for mask making. Recently, special algorithms for mask inspection of OPC assist features have been implemented by equipment vendors. Structures smaller than two inspection pixels, like assist structures, can be successfully inspected with certain algorithms. The impact of those algorithms on mask pattern requirements and suitable MRC adoptions will be discussed in the present paper.
19th Annual Symposium on Photomask Technology | 1999
Wilhelm Maurer; Christoph Friedrich; Leonhard Mader; Joerg Thiele
Alternating Phase Shift Masks (alt.PSM) became one of the primary options to keep optical lithography on its fast shrinking path. They promise -- and demonstrated by numerous examples -- lithography with k1 factors down to 0.25, which is equivalent to print structures below 100 nm using established DUV exposure tools. However, lithography at that small k1 factors is a highly non-linear process. So proximity effects are expected, when realistic chip structures have to be printed. In addition to the well-known proximity effects at the use of conventional chromium masks or half-tone phase shift masks, the width of a line printed by an alt.PSM depends also on the geometry of the surrounding phase shifters. The paper confirms, that a simulation-based OPC-tool is able to describe this effect correctly and to correct for it. However, experimental data and simulation results suggest, that there is an additional proximity effect arising from the 3- dimensional geometry of the phase edges. This proximity effect changes the effective phase of a given phase edge from its intended value. It is possible to correct this effect for one geometry, but for arbitrary geometries, phase changes as function of the proximity of phase edges must be taken into account. Based on simulation results of 3-dimensional alt.PSM geometries, we developed a strategy to include all proximity effects of alt.PSM in order to print realistic chip layouts with design rules down to 130 nm.
Proceedings of SPIE, the International Society for Optical Engineering | 2000
Christoph Dolainsky; Paul Karakatsanis; Fritz Gans; Rainer Pforr; Joerg Thiele
We present a new method of sidelobe suppressor placement based on fast lithographic simulation. Experimental results of printing 0.18 micron contact holes using a 5.5 percent transmittance attenuated phase shift mask with different settings of partial coherency are shown. Very asymmetric side lobes appear in some of these results. To explain these experimental results simulations were performed that take koma lens aberrations into account. A good agreement between experiment and simulation can be obtained them, Using these simulations a new algorithm has been implemented to place absorbing assist pattern for sidelobe suppression suitable in size and position. Then the process window of a double contact was determined using aerial image simulation. Process windows with koma lens aberrations and different settings of the partial coherency are then compared.
SPIE's 27th Annual International Symposium on Microlithography | 2002
Joerg Thiele; Marco Ahrens; Wolfgang Dettmann; Michael Heissmeier; Mario Hennig; Burkhard Ludwig; Molela Moukara; Rainer Pforr
A study to partition a gate level design into an alternating phase shift mask and a chrome on glass trim mask is presented. After determination of important rules for the partitioning by simulation, all investigated gate level pattern could be partitioned, only with slight modifications of the wiring. By application of optical proximity correction (OPC) good gate width and sufficient pattern fidelity control was obtained with the chosen OPC methodology using a calibrated optical model. Nevertheless, several indications of weak spots at two dimensional patterns at extreme defocus are discussed based on experimental data and simulation. To further improve the process window of such pattern, new methods are necessary to detect and prevent such remaining weak spots.
Optical Microlithography XVI | 2003
Rainer Pforr; Marco Ahrens; Wolfgang Dettmann; Mario Hennig; Roderick Koehle; Burkhard Ludwig; Nicolo Morgana; Joerg Thiele
The lithographic potential of alternating PSM for sub-100nm gate patterning have been evaluated in comparison to alternative techniques. The status of the key elements of the full level alternating PSM approach including design conversion, optical proximity correction, mask making, double exposure and phase-shifting mask imaging will be demonstrated for a 256MDRAM device. Experimental data describing the phase-shifting mask quality, the lithographic process windows and the CD control obtained for alternating PSM in full level and array only approach will be presented.
Proceedings of SPIE, the International Society for Optical Engineering | 2000
Werner Fischer; Ines Anke; Giorgio Schweeger; Joerg Thiele
Simulation-based optical proximity correction (OPC) is applied to print the gate level of a state-of-the-art, high- volume DRAM technology. Using 248 nm lithography, critical structures down to 170nm are printed.
Optical Microlithography XVII | 2004
Rainer Pforr; Mario Hennig; Roderick Koehle; Nicolo Morgana; Joerg Thiele; Jens Weckesser
The lithographic potential of various mask types for the printing of 65nm features has been investigated by simulation and experimentation. As key parameters process window, mask error enhancement factor, balancing performance, and phase and CD error susceptibility have been analyzed. Alternating chromeless phase-shifting masks (PSM) show the smallest mask error enhancement factor (MEEF), but the largest phase and CD error sensitivity. Alternating PSM have a larger MEEF but require less tight mask specifications. Double edge chromeless PSM combine small MEEF value with relaxed phase and CD control specifications when an appropriate illumination is chosen. Good intra-field CD control and sufficient large process window for 65nm pattern can be obtained for this mask type. The impact of aberrations and pupil imperfections on the CD control has been investigated. The mask processes will be discussed and mask performance data introduced.
20th European Conference on Mask Technology for Integrated Circuits and Microcomponents | 2004
Rainer Pforr; Wolfgang Dettmann; M. Eisenhut; Mario Hennig; Detlef Hofmann; Joerg Thiele; Guido Thielscher
Contact layers of the DRAM manufacturing process can be printed well using alternating phase-shifting masks. State-of-the-art mask making tools have sufficient performance to manufacture defect free contact masks. The enlarged process window compared to conventional masks allows to shrink the contacts size or to substitute advanced scanners by older generation steppers for contact layer patterning. Using older generation exposure systems may cause problems originating in worse lens aberration performance. A method will be described how to overcome overlay problems by applying a specifically designed OL measurement target.
19th Annual Symposium on Photomask Technology | 1999
Rainer Pforr; Fritz Gans; Juergen Knobloch; Joerg Thiele
A novel technique of sidelobe suppression based on absorbing assist pattern is introduced. Chrome shields are placed exactly at the position, where sidelobes appear. The effectiveness of this technique for sidelobe control is demonstrated by simulation and experimental results. The resulting process window enlargement for 180 nm contacts is investigated. Corresponding mask making issues are discussed.
Archive | 2006
Mario Hennig; Wolfram Koestler; Molela Moukara; Joerg Thiele; Thorsten Dr.rer.nat. Winkler; Karsten Zeiler