John D. Crow

Thermal performance and limitations of silicon–substrate packaged GaAs laser arrays

Thermal resistance and crosstalk have been investigated for a source package consisting of a monolithic, multilaser heterojunction array mounted on a single crystalline silicon substrate, which is in turn laminated to a copper heatsink. Models for 2-D and 3-D heat spreading are used to calculate the heat flow distribution and to obtain upper and lower bounds for both resistance of single devices and crosstalk in arrays. Results for experimental five-laser arrays are shown to fall within these limits. Active cooling is required to maintain junctions at safe operating temperatures prerequisite to stable, long-lived operation.

Gallium arsenide laser-array-on-silicon package.

A monolithic array of AlGaAs lasers has been packaged together with an array of fiber lightguides on a substrate of silicon. The components have been optimized for maximum lightguide output radiance consistent with reliable cw laser operation. Coupling efficiencies up to 80% have been achieved between laser and lightguide. Output powers up to 70 mW cw have been observed from a 50-microm core diameter lightguide of 0.15 numerical aperture. Eight-device array multispot packages have been fabricated with 10 mW/spot, limited by laser quality and thermoelectric cooler capacity. Fabrication tolerances and device electrical and optical crosstalk are discussed.

OptoElectronic Technology Consortium (OETC) parallel optical data link: components, system applications, and simulation tools

This paper discusses the present state of the art of components, systems, and application technology related to parallel optical data links (ODL) as demonstrated by the OptoElectronic Technology Consortium (OETC). Parallel ODL technology is poised for large volume commercialization despite some uncertainties in industrial standards and system applications. This is fueled by the demand for high-bandwidth to support the upcoming information age. To meet the need for low-cost, broadband digital multimedia services, parallel ODL technology faces the challenge of providing reasonable cost/performance ratios when compared with other established technologies. Responding to this challenge has required the integration of a number of state-of-the-art component technologies (e.g. VCSEL, monolithic integrated photoreceiver, MCM, GaAs IC, optical array connector and cable) with system designs and applications.

GaAs laser array source package.

A GaAs laser array multispot source has been fabricated in which the array is bonded to a silicon substrate, which also contains an accurately aligned collimating lens and an array of fiber lightguides. The coupling efficiency of each laser to its corresponding lightguide is greater than 50%. The package is cooled by a thermoelectric cooler, allowing cw, room-temperature operation of the array at 5 mW output per fiber. This source is useful for multichannel optical-communication applications.

Parallel fiber-optic SCI links

Parallel fiber-optic links promise to be a key enabling technology for distributed computing, substantially increasing transmission distance and bandwidth. The drive to include more and more processors and I/O devices in parallel-processor complexes has created a need for box-to-box interconnection links capable of delivering bandwidth comparable to system backplanes. Point-to-point links overcome the speed and cost constraints of shared buses. However, copper-based point-to-point links can reliably carry high-speed data only a limited distance. Parallel fiber-optic links substantially increase transmission distance and surpass coppers bandwidth capability. Our research addresses the integration of parallel fiber-optic data links into system designs that require a high-bandwidth link over moderate distances. To demonstrate the feasibility of using parallel fiber-optic technology as a fundamental building block in large-scale commercial and parallel machines, we constructed a link testbed.

Computer modeling and simulation of the Optoelectronic Technology Consortium (OETC) optical bus

The Optoelectronic Technology Consortium (OETC) 16 Gbit/s, 32-channel parallel fiber optic bus introduces new requirements for modeling and simulation of an optical bus which were not present for previous single-channel optical link systems. These requirements include the simulation of the statistical variation in component parameters, timing skew, and crosstalk. Due to the required simulation of statistical variation in component parameters, a time efficient simulation approach such as the quasi-analytical simulation methodology is vital. In addition, the adoption of a block-oriented simulation environment facilitates mixed-level simulation which minimizes the computational requirements of the bus simulation while achieving the required accuracy in the simulation of all bus components. Simulation results indicate that while noise is not a limiting factor in the performance of the optical bus, timing skew, and device uniformity across the channels of the bus are the most important factors for satisfactory performance. Experimental measurements confirm these simulation results.

Effect of bit-rate, bias, and threshold currents on the turn-on timing jitter in lasers modulated with uncoded and coded waveforms

In this letter, we investigate the effect of the turn-on time jitter in semiconductor lasers biased below threshold on the system performance. It is shown that by appropriate scrambling or coding, the pattern dependent turn-on time jitter can be reduced, which will lead to improved system performance. It is shown that the Manchester code is less sensitive to the setting of the bias point than the data with unconstrained run length, leading to a more robust link.

Optical interconnect technology for multiprocessor networks

Networks for connecting processors to each other will require Gigabit/sec data rate; high speed setup; dense packaging, comparable to VLSI electronics; robustness, in terms of reliable components, low link bit-error-rate, and easy reconfigurability; and low cost. A GaAs based OEIC chip with all link adapter functions on one chip, a multichip carrier with self-aligned optics and opto- electronics, and multimode fiber arrays cable and connectors are optical technology elements that could be developed in the near term to provide such a multiprocessor network technology. However, component and link development work is still required to verify the technologys potential for reliability, volume manufacturability, and low cost.

High-performance high-yield, uniform 32-channel optical receiver array

Many applications for optical interconnection either require more data rate than serial links offer or are architected for parallel line (data bus) implementations. Essential to low-cost optical bus implementations are monolithic arrays of photo-receivers with high yield and uniform properties. We present a 32-channel optical receiver array fabricated in 1.2-/spl mu/m GaAs E/D MESFET technology. Each channel runs at the data rate of 1 Gbit/s, equivalently providing 32 Gbit/s with 32 channels.

Fiber Optics For High Speed Computer Input/Output Channels

In a mainframe computing system, the transfer of data between the processor/memory and the input/output/storage subsystems is done on the I/O channel links. With the demands for computing power increasing at above 40% per year, there is an ever increasing demand for more channel links and more performance on the link. Recent enhancements of the channel protocols make it possible to push the data transfer rate to the hardware limit due to the skew of bits on the parallel lines of the current link. The serialization of the interface with a fiber optic implementation would offer the potential of even more performance from the I/O Channel. For fiber optics to be attractive, the components must offer performance in the hundreds of Mbits/sec, with high reliability (less than 10-12 BER), low power consumption, small packaging profile, and low cost. To date, such components are not commercially available. At IBM Research, a 200 Mbit/sec, 1 km prototype serial subsystem has been built with emphasis on the development of attractive electro-optic components. Laser packaging was done using a Si chip as the substrate for both laser and fiber. A single chip, high sensitivity receiver was built with a digital IBM logic gate array chip. A monolithic dual laser chip and package were developed to enhance the availability of the transmitter. This talk will discuss the features of these developments and the possibilities for fiber optics in a large computer system.