John Harold Magerlein

Interconnects in the third dimension: design challenges for 3D ICs

Despite generation upon generation of scaling, computer chips have until now remained essentially 2-dimensional. Improvements in on-chip wire delay and in the maximum number of I/O per chip have not been able to keep up with transistor performance growth; it has become steadily harder to hide the discrepancy. 3D chip technologies come in a number of flavors, but are expected to enable the extension of CMOS performance. Designing in three dimensions, however, forces the industry to look at formerly-two- dimensional integration issues quite differently, and requires the re-fitting of multiple existing EDA capabilities.

A Practical Implementation of Silicon Microchannel Coolers for High Power Chips

This paper describes a practical implementation of a single-phase Si microchannel cooler designed for cooling very high power chips such as microprocessors. Through the use of multiple heat exchanger zones and optimized cooler fin designs, a unit thermal resistance 10.5 C-mm2 /W from the cooler surface to the inlet water was demonstrated with a fluid pressure drop of <35kPa. Further, cooling of a thermal test chip with a microchannel cooler bonded to it packaged in a single chip module was also demonstrated for a chip power density greater than 300W/cm2. Coolers of this design should be able to cool chips with average power densities of 400W/cm2 or more

Multiphysics simulations: Challenges and opportunities

We consider multiphysics applications from algorithmic and architectural perspectives, where “algorithmic” includes both mathematical analysis and computational complexity, and “architectural” includes both software and hardware environments. Many diverse multiphysics applications can be reduced, en route to their computational simulation, to a common algebraic coupling paradigm. Mathematical analysis of multiphysics coupling in this form is not always practical for realistic applications, but model problems representative of applications discussed herein can provide insight. A variety of software frameworks for multiphysics applications have been constructed and refined within disciplinary communities and executed on leading-edge computer systems. We examine several of these, expose some commonalities among them, and attempt to extrapolate best practices to future systems. From our study, we summarize challenges and forecast opportunities.

A practical implementation of silicon microchannel coolers for high power chips

The paper describes a practical implementation of a single-phase Si microchannel cooler designed for cooling very high power chips such as microprocessors. Through the use of multiple heat exchanger zones and optimized cooler fin designs, a unit thermal resistance of 10.5 C-mm/sup 2//W from the cooler surface to the inlet water was demonstrated with a fluid pressure drop of less than 35 kPa. Further, cooling of a thermal test chip with a microchannel cooler bonded to it packaged in a single chip module was also demonstrated for a chip power density greater than 300 W/cm/sup 2/. Coolers of this design should be able to cool chips with average power densities of 400 W/cm/sup 2/ or more.

High-efficiency 60 GHZ antenna fabricated using low-cost silicon micromachining techniques

In this paper, a miniature, multi-functional Si-based packaging technology which can reduce the size and cost and increase the performance of a wide range of millimeter wave systems is proposed. High density capacitors, low temperature coefficient resistors, high-Q inductors, low-loss transmission lines, filters and antennas can all be built within the Si package using standard semiconductor fabrication methods with very high manufacturing precision compared to conventional packaging technologies. Fine pitch metal bumps can be used to attach RF ICs and other components, while bonding can provide hermetic sealing where required. Vias through the Si package eliminates inductive bond wires and minimize parasitics at millimeter wave frequencies. By integrating both antenna and an RF IC in one single package, all high frequency signals are confined within the package and only baseband signals connected to the external package.

Towards real-time simulation of cardiac electrophysiology in a human heart at high resolution

We have developed the capability to rapidly simulate cardiac electrophysiological phenomena in a human heart discretised at a resolution comparable with the length of a cardiac myocyte. Previous scientific investigation has generally invoked simplified geometries or coarse-resolution hearts, with simulation duration limited to 10s of heartbeats. Using state-of-the-art high-performance computing techniques coupled with one of the most powerful computers available (the 20 PFlop/s IBM BlueGene/Q at Lawrence Livermore National Laboratory), high-resolution simulation of the human heart can now be carried out over 1200 times faster compared with published results in the field. We demonstrate the utility of this capability by simulating, for the first time, the formation of transmural re-entrant waves in a 3D human heart. Such wave patterns are thought to underlie Torsades de Pointes, an arrhythmia that indicates a high risk of sudden cardiac death. Our new simulation capability has the potential to impact a multitude of applications in medicine, pharmaceuticals and implantable devices.

Development of an Experimental Facility for Investigating Single-Phase Liquid Flow in Microchannels

An experimental facility has been developed to investigate single-phase liquid heat transfer and pressure drop in a variety of microchannel geometries. The facility is capable of accurately measuring the fluid temperatures, heater surface temperatures, heat transfer rates, and differential pressure in a test section. A microchannel test section with a silicon substrate is used to demonstrate the capability of the experimental facility. A copper resistor is fabricated on the backside of the silicon to provide heat input. Several other small copper resistors are used with a four-point measurement technique to acquire the heater temperature and calculate surface temperatures. A transparent pyrex cover is bonded to the chip to form the microchannel flow passages. The details of the experimental facility are presented here. The experimental facility is intended to support the collection of fundamental data in microchannel flows. It has the capability of optical visualization using a traditional microscope to see dyes and particles. It is also capable of performing micro-particle image velocimetry in the microchannels to detect the flow field occurring in the microchannel geometries. The experimental uncertainties have been carefully evaluated in selecting the equipment used in the experimental facility. The thermohydraulic performance of microchannels will be studied as a function of channel geometry, heat flux, and liquid flow rate. Some preliminary results for a test section with a channel width of 100 micrometers, a depth of 200 micrometers, and a fin thickness of 40 micrometers are presented.

Tunnel barriers on Pb–In–Au alloy films

Tunnel barrier oxides consisting primarily of In2O3 formed on Pb–In–Au alloys by various thermal and rf‐plasma oxidation techniques were characterized in situ using ellipsometry and Auger Electron Spectroscopy (AES). The results were compared to measurements of the Josephson critical current density j1 and the specific capacitance of tunnel junctions fabricated on the same wafers. It was found for junctions with oxides consisting entirely of In2O3 that j1 exceeded 3 KA/cm2 and did not depend strongly on oxide thickness from about 3 nm (for thermally‐grown oxides) to 4.5–7 nm (for rf‐grown oxides). The addition of a thin layer of PbOx at the top of the barrier, either by backscattering during rf oxidation or by deposition onto a thermal oxide, caused by a substantial decrease in j1, while the presence of PbO in the bulk of the oxide had little effect. The specific capacitance of the lower current density junctions was essentially the same for either 3‐ or 4.5–6‐nm thick oxides and was consistent with a bar...

The composition of oxides grown on PbInAu films by rf oxidation

Oxides grown on PbInAu alloys using a combined thermal and rf oxidation process have been examined with x‐ray photoemission spectroscopy (XPS or ESCA) and ellipsometry. The oxides were prepared on alloy films deposited at 300 K containing 13 and 26 at. % In in the PbIn phase and on fine‐grain alloy films deposited at 95 K containing 13 at. % In. Following an in situ thermal oxidation at 75 °C, the films were rf‐plasma oxidized while mounted on an electrode coated with either In or photoresist. The XPS spectra showed that both lead oxide and indium oxide were present, in agreement with previous findings that the bulk of such oxides consists of a layer of In2O3 overlying a layer of PbO. The binding energy of the Pb 4f peak from the oxide was shifted by 0.9–1 eV from the metal peak, a shift characteristic of PbO. Analysis of the XPS intensities based on a layered structure indicated that oxides on the films deposited at 300 K consisted of about 2.7 nm of In2O3 on top of 1.6 nm of PbO. Oxides on the fine‐grai...

Measurement of microbump thermal resistance in 3D chip stacks

The thermal resistance of Pb-free ~25 μm diameter microbumps with pitches of 50, 71, and 100 μm has been measured with and without underfill in four high chip stacks. With underfill, the unit thermal resistance values were 8.0, 15.5, and 19.0 C-mm2/W for 50, 71, and 100 μm pitch microbumps, respectively. The average microbump height was 16.1 microns. For the 50 μm pitch case, the thermal conduction through the underfill is roughly equal to that of the microbumps alone.