John P. Reifenberg
Stanford University
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Featured researches published by John P. Reifenberg.
Proceedings of the IEEE | 2010
H.-S.P. Wong; Simone Raoux; SangBum Kim; Jiale Liang; John P. Reifenberg; Bipin Rajendran; Mehdi Asheghi; Kenneth E. Goodson
In this paper, recent progress of phase change memory (PCM) is reviewed. The electrical and thermal properties of phase change materials are surveyed with a focus on the scalability of the materials and their impact on device design. Innovations in the device structure, memory cell selector, and strategies for achieving multibit operation and 3-D, multilayer high-density memory arrays are described. The scaling properties of PCM are illustrated with recent experimental results using special device test structures and novel material synthesis. Factors affecting the reliability of PCM are discussed.
IEEE Electron Device Letters | 2008
John P. Reifenberg; David L. Kencke; Kenneth E. Goodson
Thermal conduction governs the writing time and energy of phase-change memory (PCM) devices. Recent measurements demonstrated large thermal resistances at the interfaces of phase-change materials with neighboring electrode and passivation materials. In this letter, electrothermal simulations quantify the impact of these resistances on the set to reset transition. The programming current decreases strongly with increasing boundary resistance due to increased lateral temperature uniformity, which cannot be captured using a reduced effective conductivity in the phase-change material. Reductions in programming current from 20% to 30% occur for an interface resistance of 50 m2middotK/GW. The precise spatial distribution of thermal properties is critical for the simulation of PCM devices.
Applied Physics Letters | 2007
John P. Reifenberg; Matthew A. Panzer; SangBum Kim; Aaron Gibby; Yuan Zhang; S. Simon Wong; H.-S. Philip Wong; Eric Pop; Kenneth E. Goodson
Thermal conduction in GeSbTe films strongly influences the writing energy and time for phase change memory (PCM) technology. This study measures the thermal conductivity of Ge2Sb2Te5 between 25 and 340°C for layers with thicknesses near 60, 120, and 350nm. A strong thickness dependence of the thermal conductivity is attributed to a combination of thermal boundary resistance (TBR) and microstructural imperfections. Stoichiometric variations significantly alter the phase transition temperatures but do not strongly impact the thermal conductivity at a given temperature. This work makes progress on extracting the TBR for Ge2Sb2Te5 films, which is a critical unknown parameter for PCM simulations.
IEEE Electron Device Letters | 2010
John P. Reifenberg; Kuo-Wei Chang; Matt Panzer; SangBum Kim; Jeremy A. Rowlette; Mehdi Asheghi; H.-S.P. Wong; Kenneth E. Goodson
Thermal interfaces play a key role in determining the programming energy of phase-change memory (PCM) devices. This letter reports the picosecond thermoreflectance measurements of thermal boundary resistance (TBR) at TiN/GST and Al/TiN interfaces, as well as the intrinsic thermal conductivity measurements of fcc GST between 30°C and 325°C. The TiN/GST TBR decreases with temperature from ~26 to ~18 m2·K/GW, and the Al/TiN ranges from ~7 to 2.4 m2·K/GW. A TBR of 10 m2·K/GW is equivalent in thermal resistance to ~192 nm of TiN. The fcc GST conductivity increases with temperature between ~0.44 and 0.59 W/m/K. A detailed understanding of TBR is essential for optimizing the PCM technology.
Journal of Applied Physics | 2011
Jaeho Lee; Zijian Li; John P. Reifenberg; Sang-Chul Lee; Robert Sinclair; Mehdi Asheghi; Kenneth E. Goodson
Although lateral thermal conduction in Ge2Sb2Te5 (GST) films can influence the performance of phase change memory (PCM), there are no data available for the in-plane thermal conductivity. This work measures both the in-plane and the out-of-plane thermal conductivities for the amorphous, face-centered-cubic, and hexagonal-close-packed phases of GST using two independent techniques. For crystalline GST, we report anisotropy favoring out-of-plane conduction by up to 54%, which varies with annealing time. Scaling arguments indicate that the anisotropy may be due to the thermal resistance of amorphous regions near grain boundaries. This explanation is consistent with transmission electron microscopy images showing columnar grains and amorphous phase at grain boundaries.
international electron devices meeting | 2005
Eric Pop; David Mann; John P. Reifenberg; Kenneth E. Goodson; Hongjie Dai
This work represents the first electro-thermal study of metallic single-wall carbon nanotubes (SWNTs) for interconnect applications. Experimental data and careful modeling reveal that self-heating is of significance in short (1 < L < 10 mum) nanotubes under high-bias. The low-bias resistance of micron scale SWNTs is also found to be affected by optical phonon absorption (a scattering mechanism previously neglected) above 250 K. We also explore length-dependent electrical breakdown of SWNTs in ambient air. Significant self-heating in SWNT interconnects can be avoided if power densities per unit length are limited to less than 5 muW/mum
IEEE Transactions on Electron Devices | 2011
SangBum Kim; Byoungil Lee; Mehdi Asheghi; Fred Hurkx; John P. Reifenberg; Kenneth E. Goodson; H.-S. Philip Wong
We study the drift behavior of RESET resistance RRESET and threshold switching voltage Vth in phase-change memory (PCM) and their temperature dependence. To extend the temperature-dependent measurement to microsecond time scales, we integrate an innovative micro-thermal stage (MTS) on the PCM cell. The MTS changes the temperature of the programmed region of the PCM cell within a few microseconds by placing the Pt heater in close proximity of the programmed region. First, we experimentally verify the existing phenomenological RRESET and Vth drift model for constant annealing temperature at various temperatures between 25°C and 185°C down to 100 μs and show that the measured temperature dependence of the drift coefficient agrees well with what is expected from the existing drift models. Based on the existing drift model for a constant annealing temperature, we derive the analytical expression for the RRESET drift for time-varying annealing temperature and experimentally verify the analytical expression. The derived analytical expression is important to understand the impact of thermal disturbance on PCM reliability such as variations in RRESET and Vth.
international reliability physics symposium | 2010
SangBum Kim; Byoungil Lee; Mehdi Asheghi; G. A. M. Hurkx; John P. Reifenberg; Kenneth E. Goodson; H.-S. Philip Wong
In this paper, we study thermal disturbance and its impact on reliability using a novel measurement structure - the micro-thermal stage (MTS). The small thermal time constant of the MTS extends the time-scale of temperature dependence measurement to ∼100 µs. The reliability of phase-change memory (PCM) is evaluated in terms of data retention and variation of the high resistance (RESET) state resistance (RRESET) and the threshold switching voltage (Vth). We experimentally show how the impact of thermal disturbances on retention is accumulated and its dependence on the electric field. The thermal disturbance effect on RRRESET variation changes with time and it is the largest for the shortest time delay after RESET programming. Thermal disturbance can cause at least 25 and 100% variation for RRRESET and Vth respectively in the given thermal disturbance scenario. We propose an effective method to exploit thermal disturbance to make multi-bit operation more robust.
international electron devices meeting | 2007
David L. Kencke; Ilya V. Karpov; Brian G. Johnson; Sean Jong Lee; DerChang Kau; Stephen J. Hudgens; John P. Reifenberg; Semyon D. Savransky; Jingyan Zhang; Martin D. Giles; Gianpaolo Spadini
Phase change memory (PCM) research has largely focused on bulk properties to evaluate cell efficiency. Now both electrical and thermal interface resistances are characterized and shown to be critical for understanding power in a novel damascene-GST cell. Interfaces reduce reset power 20% and reset current 40% and allow reset current to scale faster than it would without interfaces.
IEEE Electron Device Letters | 2011
Elah Bozorg-Grayeli; John P. Reifenberg; Matthew A. Panzer; Jeremy A. Rowlette; Kenneth E. Goodson
The programming current required to switch a phase-change memory cell depends upon the thermal resistances in the device. In many designs, significant heat loss occurs through the electrode. This letter investigates the thermal properties of a multilayer electrode stack. This material offers greater thermal resistance than single-material electrodes due to the presence of multiple thermal boundary resistances (TBRs), reducing heat loss from the device and potentially lowering the programming current. Picosecond time-domain thermoreflectance interrogates the temperature-dependent thermal conductivity of three as-deposited and postannealed electrode materials: carbon, titanium nitride, and tungsten nitride. These data are used to extract the temperature-dependent, as-deposited, and postannealed TBR in two multilayer electrode stacks: carbon-titanium nitride and tungsten-tungsten nitride. The C-TiN stacks demonstrate an as-deposited TBR of 4.9 m2K/GW, increasing to 11.9 m2K/GW postanneal. The W-WNx stacks demonstrate an as-deposited TBR of 3.9 m2K/GW, decreasing to 3.6 m2 K/GW postanneal. These resistances are equivalent to electrode films with thickness on the order of tens of nanometers.