Sei Hyung Ryu

Critical Issues for MOS Based Power Devices in 4H-SiC

In this paper, we present the effects of MOS channel processing on the threshold voltage and the MOS field effect mobility of 4H-SiC MOSFETs. By increasing the p-well doping concentration by two orders of magnitude, the threshold voltage could be shifted positive from 0V to 5 V when a thermal oxide layer with NO post oxidation anneal was used as the gate dielectric layer. However, a severe degradation of MOS field effect mobility, decreasing from 37 cm2/Vs to 5 cm2/Vs, was also observed. Using a different processing technique, which uses a deposited oxide layer with an NO anneal, a threshold voltage of 7.5 V and a MOS field effect mobility of 15 cm2/Vs could be achieved. A 10 kV, 1 A power DMOSFET was demonstrated with this technique. A DMOSFET turn-off voltage of 5.25 V was measured at room temperature, which shifted to 3.0 V at 250oC, providing acceptable noise margins throughout the operating temperature range.

Performance, Reliability, and Robustness of 4H-SiC Power DMOSFETs

In this paper, we review the performance, reliability, and robustness of the current 4H-SiC power DMOSFETs. Due to advances in device and materials technology, high power, large area 4H-SiC power DMOSFETs (1200 V, 67 A and 3000 V, 30 A) can be fabricated with reasonable yields. The availability of large area devices has enabled the demonstration of the first MW class, all SiC power modules. Evaluations of 1200 V 4H-SiC DMOSFETs showed that the devices offer avalanche power exceeding those of commercially available silicon power MOSFETs, and have the sufficient short circuit robustness required in most motor drive applications. A recent TDDB study showed that the gate oxides in 4H-SiC MOSFETs have good reliability, with a 100-year lifetime at 375oC if Eox is limited to 3.9 MV/cm. Future work on MOS reliability should be focused on Vth shifts, instead of catastrophic failures of gate oxides.

4H-SiC DMOSFETs for High Speed Switching Applications

Due to the high critical field in 4H-SiC, the drain charge and switching loss densities in a SiC power device are approximately 10X higher than that of a silicon device. However, for the same voltage and resistance ratings, the device area is much smaller for the 4H-SiC device. Therefore, the total drain charge and switching losses are much lower for the 4H-SiC power device. A 2.3 kV, 13.5 mW-cm2 4H-SiC power DMOSFET with a device area of 2.1 mm x 2.1 mm has been demonstrated. The device showed a stable avalanche at a drain bias of 2.3 kV, and an on-current of 5 A with a VGS of 20 V and a VDS of 2.6 V. Approximately an order of magnitude lower parasitic capacitance values, as compared to those of commercially available silicon power MOSFETs, were measured for the 4H-SiC power DMOSFET. This suggests that the 4H-SiC DMOSFET can provide an order of magnitude improvement in switching performance in high speed switching applications.

Development of 10 kV 4H-SiC Power DMOSFETs

In this paper, we report power 4H-SiC DMOSFETs with a 10 kV blocking capability the highest reported blocking voltage for a switching device in SiC to this date. The devices utilized 115 μm thick n-type epilayers with a doping concentration of 6 x 10 14 cm -3 for drift layers. Three zone Junction Termination Extension (JTE) regions formed by boron ion-implantations were employed as edge termination for the devices, which reduced the sensitivity of blocking capability of the devices to process variations. The gate oxide layer was formed by thermal oxidation at 1200 o C, followed by an N2O anneal at 1300 o C. A peak effective channel mobility of 14.5 cm 2 /Vs and a threshold voltage of 10 V were measured from a test MOSFET with a W/L of 150 μm / 150 μm, which was built adjacent to the power DMOSFETs. A 4H-SiC DMOSFET with an active area of 4.2 x 10 -3 cm 2 showed a specific on-resistance of 236 mΩ-cm 2 at room temperature with a gate bias of 25 V. The device shows a leakage current of 70 μA, which corresponds to a leakage current density of 16 mA-cm -2 at a drain bias of 10 kV.

Influence of Basal Plane Dislocation Induced Stacking Faults on the Current Gain in SiC BJTs

SiC BJTs show instability in the I-V characteristics after as little as 15 minutes of operation. The current gain reduces, the on-resistance in saturation increases, and the slope of the output characteristics in the active region increases. This degradation in the I-V characteristics continues with many hours of operation. It is speculated that this phenomenon is caused by the growth of stacking faults from certain basal plane dislocations within the base layer of the SiC BJT. Stacking fault growth within the base layer is observed by light emission imaging. The energy for this expansion of the stacking fault comes from the electron-hole recombination in the forward biased base-emitter junction. This results in reduction of the effective minority carrier lifetime, increasing the electron-hole recombination in the base in the immediate vicinity of the stacking fault, leading to a reduction in the current gain. It should be noted that this explanation is only a suggestion with no conclusive proof at this stage.

Development of 15 kV 4H-SiC IGBTs

We present our latest developments in ultra high voltage 4H-SiC IGBTs. A 6.7 mm x 6.7 mm 4H-SiC N-IGBT with an active area of 0.16 cm2 showed a blocking voltage of 12.5 kV, and demonstrated a room temperature differential specific on-resistance of 5.3 mΩ-cm2 with a gate bias of 20 V. A 4H-SiC P-IGBT exhibited a record high blocking voltage of 15 kV, while showing a differential specific on-resistance of 24 mΩ-cm2. A comparison between P- and N- IGBTs in 4H-SiC is provided in this paper.

Performance of 60 A, 1200 V 4H-SiC DMOSFETs

Large area (8 mm x 7 mm) 1200 V 4H-SiC DMOSFETs with a specific on-resistance as low as 9 m•cm2 (at VGS = 20 V) able to conduct 60 A at a power dissipation of 200 W/cm2 are presented. On-resistance is fairly stable with temperature, increasing from 11.5 m•cm2 (at VGS = 15 V) at 25°C to 14 m•cm2 at 150°C. The DMOSFETs exhibit avalanche breakdown at 1600 V with the gate shorted to the source, although sub-breakdown leakage currents up to 50 A are observed at 1200 V and 200°C due to the threshold voltage lowering with temperature. When switched with a clamped inductive load circuit from 65 A conducting to 750 V blocking, the turn-on and turn-off energies at 150°C were less than 4.5 mJ.

A Comparison of High Temperature Performance of SiC DMOSFETs and JFETs

High temperature characteristics of 4H-SiC power JFETs and DMOSFETs are presented in this paper. Both devices are based on pn junctions in 4H-SiC, and are capable of 300oC operation. The 4H-SiC JFET showed very predictable, well understood temperature dependent characteristics, because the current conduction depends on the drift of electrons in the bulk region, which is not restricted by traps in the MOS interface or at the pn junctions. On the other hand, in a 4H-SiC DMOSFET, electrons must flow through the MOS inversion layer with a very high interface state density. At high temperatures, the transconductance of the device improves and threshold voltage shifts negative because less electrons are trapped in the interface states, resulting in a much lower MOS channel resistance. This cancels out the increase in drift layer resistance, and as a result, a temperature insensitive on-resistance can be demonstrated. The performance of the two devices are compared, and a discussion of issues for their high temperature application is presented.

Reliability Performance of 1200 V and 1700 V 4H-SiC DMOSFETs for Next Generation Power Conversion Applications

We present new reliability results on the Cree, Inc., 4H-SiC, DMOSFET devices. The Cree DMOSFETs were developed to meet the demand of next-generation, high-frequency power switching applications, such as: dc-ac inversion, dc-dc conversion, and ac-dc rectification, with continually improving energy efficiency. The Cree Generation 2 DMOSFET process technology is now commercially available with 1200 V and 1700 V ratings. We have performed intrinsic reliability studies to ensure excellent wear-out performance and long field lifetime of the products. We have also performed large sample size qualification reliability acceptance tests to ensure the quality of the manufacturing and packaging processes. These comprehensive reliability studies establish new benchmarks for wide bandgap transistors and demonstrate that Crees MOSFETs meet or exceed all industrial reliability requirements. This achievement facilitates broad market adoption of this disruptive power switch technology.

9 kV 4H-SiC IGBTs with 88 mΩ·cm2 of R diff, on

SiC IGBTs are suitable for high power, high temperature applications. For the first time, the design and fabrication of 9 kV planar p-IGBTs on 4H-SiC are reported in this paper. A differential on-resistance of ~ 88 m(cm2 at a gate bias of –20 V is achieved at 25°C, and decreases to ~24.8 m(cm2 at 200°C. The device exhibits a blocking voltage of 9 kV with a leakage current density of 0.1 mA/cm2. The hole channel mobility is 6.5 cm2/V-s at room temperature with a threshold voltage of –6.5 V resulting in enhanced conduction capability. Inductive switching tests have shown that IGBTs feature fast switching capability at both room and elevated temperatures.