John W. Stafford

Physical design and assembly process development of a multi-chip package containing a light emitting diode (LED) array die

This paper presents the physical design concept and process developments to construct a small module containing a chip with an array of miniature light emitting diodes (LEDs) as well as the driver control circuitry for the LED array. The module is composed of a glass substrate consisting of a fanout pattern from the I/O bond pads of the fine pitch solder bumped LED array chip. The fanout I/O pattern of the glass terminates on a 40 mil pitch ball grid array land pattern. The LED array chip is bonded face down on the glass and underencapsulated with an optically transparent underfill. All of the driver board circuitry is on a glob top plastic ball grid array (GTPBGA) package whose solder balls are reflow attached to the assembled glass substrate and underencapsulated to provide a finished display module. To implement the module concept, fine pitch (i.e. 80 /spl mu/m) 90Pb/10Sn solder bump technology, fluxless flip chip bonding, thin optically transparent underencapsulation technology had to be developed, as well as the development of a multi-chip 384 I/O 40 mil pitch glob top plastic ball grid array (GTPBGA). The solder balls on the 384 I/O GTPBGA are 30Pb/70In. The assembly technology and underencapsulation technology for the assembly of the glass substrate containing the LED array chip and the 384 I/O GTPBGA also had to be developed.

Via processing options for MCM-D fabrication: excimer laser ablation vs. reactive ion etching

The use of reactive ion etching and excimer laser ablation processes for the etching of vias through thick layers of dielectric (up to 25 mu m thick) in multichip module fabrication is evaluated. A comparison of possible masking schemes is presented. Typical etch results obtained by these techniques are shown and compared. A throughput analysis of these two via fabrication techniques for use in a high-volume multichip module substrate facility is presented. Results obtained suggest that laser processing is a viable alternative to reactive ion etching for multichip module substrate via fabrication.<<ETX>>

Development of fluxless flip chip bonding to a thin film multichip module substrate

Motorola SPS has developed an assembly process for a three-chip multichip module using a fluxless bonding technique. The substrate is a 25 mm/spl times/25 mm glass that containing two layers of electroplated metallization with vias connecting the two layers and dielectric layer separating them. A test substrate is designed to characterize the continuity and leakage of the assembled modules. One of the chips has two staggered rows of 384 total bumps on the periphery with 80 /spl mu/m pitch and 45 /spl mu/m bump size. The other two chips have three staggered rows, 222 bumps on each chip, 210 /spl mu/m pitch and 100 /spl mu/m bump size. The bump composition is Pb-Sn with low Sn content. All three chips are bonded to the substrate using a fluxless plasma process followed by reflow in a nitrogen furnace. A high precision robot is used for placement and tacking of the chips on the substrate. After the bonding, the chips are underfilled with a proprietary underfill epoxy, and tested for reliability. All the reliability criteria for the specific application of this module have been met. Physical design and assembly process of this multichip module will be presented.