Joseph A. Yedinak

IGBT behavior during desat detection and short circuit fault protection

A common fault condition in motor drive applications involves an IGBT turning on into a short-circuit. If the only impedance is the cable inductance to a shorted motor winding, the current through the device ramps up very rapidly until it saturates, forcing the IGBT voltage to rise to the DC clamp. After fault detection, depending on the point at which the fast turn-off pulse is applied, very different levels of hole current can flow under the n/sup +/ source region, making this an important factor in the successful containment of the fault current. We present experimental observations showing that IGBT failure under short-circuit conditions is dependent on where the turn-off pulse is applied. The physics of this behavior is explained using numerical mixed-mode simulations. A practical two step gate waveform is studied for avoidance of device failure under short-circuit conditions, and is experimentally demonstrated.

A 600V quick punch through (QPT) IGBT design concept for reducing EMI

Punch Through IGBTs inherently generate more EMI than their MOSFET counter part. This results from the nature of the IGBT being a two carrier device and the switching characteristics being controlled by the gain of the p-n-p bipolar. The EMI is a direct result of the abrupt turn-off di/dt. In this paper, a novel IGBT, the QPT, that enables the PT IGBT to switch similar to a MOSFET is presented and analyzed. This is achieved by designing the PT IGBT with a thinner lower concentration drift region. This allows the depletion layer to punch through to the buffer at a lower voltage. The capacitances of the QPT are optimized so that the channel remains open until the collector voltage reaches the bus voltage. This provides the ability to control and thereby minimize the turn-off di/dt.

Enhanced IGBT self clamped inductive switching (SCIS) capability through vertical doping profile and cell optimization

In this paper, we analyze the impact of cell and vertical structure design to enhance the energy handling capability of the IGBT used in automotive ignition applications. The self-clamped inductive switching (SCIS) capability of the IGBT is presented both experimentally and through non-isothermal two-dimensional numerical simulations. It is shown that the SCIS energy density capability can be increased by up to 35% by optimization of the cell and vertical structure.

Avalanche instability in oxide charge balanced power MOSFETs

Power MOSFET designs have been moving to higher performance particularly in the medium voltage area. (60V to 300V) New designs require lower specific on-resistance (RSP) thus forcing designers to push the envelope of increasing the electric field stress on the shielding oxide, reducing the cell pitch, and increasing the epitaxial (epi) drift doping to reduce on resistance. In doing so, time dependant avalanche instabilities have become a concern for oxide charge balanced power MOSFETs. Avalanche instabilities can initiate in the active cell and/or the termination structures. These instabilities cause the avalanche breakdown to increase and/or decrease with increasing time in avalanche. They become a reliability risk when the drain to source breakdown voltage (BVdss) degrades below the operating voltage of the application circuit. This paper will explain a mechanism for these avalanche instabilities and propose an optimum design for the charge balance region. TCAD simulation was employed to give insight to the mechanism. Finally, measured data will be presented to substantiate the theory.