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Judith H. McCullen

IBM

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Publication

Featured researches published by Judith H. McCullen.

Archive | 2006

Methodology for layout-based modulation and optimization of nitride liner stress effect in compact models

Dureseti Chidambarrao; Judith H. McCullen; David M. Onsongo; Tina Wagner; Richard Q. Williams

Archive | 2000

Process and system for maintaining 3 sigma process tolerance for parasitic extraction with on-the-fly biasing

L. William Dewey; Peter A. Habitz; Judith H. McCullen; Edward W. Seibert

Archive | 2005

Integrated circuit diagnosing method, system, and program product

Matt Boucher; John M. Cohn; Richard Dauphin; Mark Eliot Masters; Judith H. McCullen; Sarah C. Braasch; Michael H. Sitko

Archive | 2003

Device modeling for proximity effects

Eric Adler; Serge Biesemans; Micah S. Galland; Terence B. Hook; Judith H. McCullen; Eric S. Phipps; James A. Slinkman

Archive | 2000

Method of performing parasitic extraction for a multi-fingered transistor

William C. Bakker; L. William Dewey; Peter A. Habitz; Judith H. McCullen; Edward W. Seibert; Michael James Sullivan

Archive | 2011

METHOD OF DETERMINING FET SOURCE/DRAIN WIRE, CONTACT, AND DIFFUSION RESISTANCES IN THE PRESENCE OF MULTIPLE CONTACTS

Lewis William Dewey; Ning Lu; Judith H. McCullen; Cole E. Zemke

Archive | 2011

Compact model methodology for pc landing pad lithographic rounding impact on device performance

Dureseti Chidambarrao; Gerald M. Davidson; Paul A. Hyde; Judith H. McCullen; Shreesh Narasimha

Archive | 2008

Methodology for improving device performance prediction from effects of active area corner rounding

Dureseti Chidambarrao; Gerald M. Davidson; Paul A. Hyde; Judith H. McCullen; Shreesh Narasimha

Archive | 2014

Integrated circuit performance modeling using a connectivity-based condensed resistance model for a conductive structure in an integrated circuit

Ralph M. Alfano; Arnold E. Baizley; Ning Lu; Judith H. McCullen; Cole E. Zemke

Archive | 2010

***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***Methodology for improving device performance prediction from effects of active area corner rounding

Dureseti Chidambarrao; Gerald M. Davidson; Paul A. Hyde; Judith H. McCullen; Shreesh Narasimha

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Dureseti Chidambarrao

IBM

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Gerald M. Davidson

IBM

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Paul A. Hyde

IBM

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Shreesh Narasimha

IBM

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Cole E. Zemke

IBM

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David M. Onsongo

IBM

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Edward W. Seibert

IBM

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L. William Dewey

IBM

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Peter A. Habitz

IBM

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Richard Q. Williams

IBM

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