Juha Hallivuori

A Low Noise Figure 1.2-V CMOS GPS Receiver Integrated as a Part of a Multimode Receiver

This paper presents what kind of challenges are posed when a global positioning system (GPS) receiver is being added to a multiradio terminal. The GPS receiver chain is integrated as a part of a multiband and multimode receiver, designed for global system for mobile communications (GSM) and wideband code division multiple access (WCDMA). The hostile radio environment challenges in a terminal level are discussed. Especially, the modifications of the additional GPS mode to an existing receiver ASIC with minor and most necessary changes to the implementation is discussed and presented. The IC is implemented in a 0.13-mum CMOS technology without any analog options. At 1.2-V supply voltage and total power dissipation of 49 mW for the analog signal path, the proposed GPS receiver features a noise figure of 2.2 dB and an out-of-band IIP3 of +24 dBm for the worst-case test scenario, which makes it suitable to cellular handset usage in a demanding interference environment.