Pauli Seppinen

A Multimode Transmitter in 0.13

This paper presents a system-independent transmitter architecture based on a direct-digital RF-modulator which combines the D/A conversion, up-conversion, unwanted sideband rejection, power control, and part of the digital image-rejection filtering into a single mixed-signal circuit block. The multimode capability of the architecture is demonstrated with WCDMA, EDGE, and WLAN system requirements. The modulator achieves 90 dB of power control range and with an external power amplifier module, WCDMA EVM of less than 2% from signal powers of -20 dBm to +25 dBm. The noise floor level defined by the quantization noise at 190 MHz offset from the carrier is -150 dBc/Hz measured at the output of the PA with +25 dBm signal power. The analog power consumption with the maximum signal power level is 92 mW and scales down to 46 mW when reducing the signal level to -43 dBFS. The digital power consumption is 65 mW. The chip is implemented with a standard 0.13 mum 1.2 V digital CMOS with total silicon area of 4 mm2.

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An IQ-modulator constructed using direct digital-to-RF converters for wide-band multi-radio applications achieves better than -43dBc of LO-leakage and -47dBc of image rejection. The signal-level dependent maximum power consumption is 60.5mW with a -10dBm WCDMA signal. The modulator occupies 0.7mm/sup 2/ of silicon area in a standard 1.2V 0.13 /spl mu/m CMOS process.

CMOS Using Direct-Digital RF Modulator

The number of different radio systems is currently increasing in portable devices like mobile phones due to the wider range of applications that require an optimized wireless communications channel to different services or other devices. To make this cost and power efficient, the transmitter must be adaptable to several different radio systems while keeping the complexity and cost reasonable. This article presents fundamental circuit techniques to enable low cost, low power, and low complexity transmitter architecture by combining digital-to-analog conversion, up-conversion, unwanted sideband rejection, power control, and part of the digital image rejection filtering into a single mixed-signal circuit block. The direct-digital RF-modulator architecture is the basis for a software-defined radio transmitter. It was demonstrated against WCDMA system requirements, but the versatility and the performance of this architecture enables support for other radio systems, such as GPRS and WLAN.

Direct-digital RF modulator IC in 0.13 /spl mu/m CMOS for wide-band multi-radio applications

A WCDMA transmitter based on direct-digital RF modulator has a power control range of >90dB and achieves an ACPR of -58dBc with a channel power of -2dBm. Using an external PA with a power gain of 27dB, the measured EVM is <2% with signal levels from -35 to +25dBm. The chip is fabricated in a 0.13μm 1.2V CMOS process and occupies 4mm2.

Direct-digital RF-modulator: a multi-function architecture for a system-independent radio transmitter

The implemented ASICs, intended for mobile terminal usage, comprise a wideband high capacity OFDM direct conversion transceiver front-end for beyond 3G cellular systems. The transceiver operates with 83.2 MHz signal bandwidth and is designed for the operational frequency range of 5.15-5.725 GHz. The receiver and transmitter chips were fabricated with 0.13mum BiCMOS technology.