Julian G. Blake

Generation and transport of contamination in high current implanters

Abstract Sources and pathways for aluminium contamination in a high current ion implanter are studied by a set of experiments. Changes to implanter disk and beamline, the international introduction of tracer contaminants, and TRIM models of sputtered atom distributions in angel and energy are used to draw conclusions about mechanisms transporting aluminium to the wafer surface.

Uniformity characterization of an RTP system

Abstract The use of rapid thermal processing (RTP) is expanding greatly in semiconductor processing. As demands on equipment become greater, the need to characterize system performance also increases. One aspect of RTP equipment performance which has proven difficult to measure is the temperature uniformity of the wafer during processing. Several methods of direct temperature measurement are described: high speed calorimetry to measure the incident power distribution, multiple thermocouple, and scanning pyrometer measurements for directly measuring local wafer temperatures. Indirect techniques which are more applicable to end user characterization are also discussed: measurement of sheet resistance across a wafer implanted with a uniform high dose of arsenic ions and thickness uniformity of thin silicon oxides grown by rapid thermal oxidation. Finally, the use of melt uniformity and slip generation as qualitative indicators of uniformity is discussed. Examples of measurements and their use in the adjustment of a commercial system (Eaton ROA-400) are given.

Integration of a particle monitor into the control system for an ion implanter

Abstract The value of in situ particle monitors for both manufacturing process control and process development in the semiconductor industry is receiving considerable recognition. This paper discusses the integration of a high yield technology (HYT) sensor into the control system of an Baton high current ion implanter. The automatic triggering of the particle monitor during the various phases of the implant process and the autoclean cycle provides a definite representation of the machine state and the effect of processing over time. Utilizing existing features of the control system, specific thresholds can be associated with each implant process through its process recipe. By regular monitoring of the particle counter, these thresholds are used to anticipate the need for cleaning the process chamber, or if indicated, gracefully bring the current process to an immediate halt. A dedicated history log preserves detailed data for generating summary statistics and the complete data set of a particular process or overall machine performance. Future uses of this tool with the control system point toward statistical process control applications and intelligent self modifying process cycles. The presentation will include data from a system on which an HYT sensor was employed as a full time process monitor using modified SPC techniques for analysis.

Noncontact sheet resistance measurement technique for wafer inspection

A new technique, MICROTHERM, has been developed for noncontact sheet resistance measurements of semiconductor wafers. It is based on the application of microwave energy to the wafer, and simultaneous detection of the infrared radiation resulting from ohmic heating. The pattern of the emitted radiation corresponds to the sheet resistance distribution across the wafer. This method is nondestructive, noncontact, and allows for measurements of very small areas (several square microns) of the wafer.

Shallow SIMOX Technology (SST): A Double Mechanically Scanned Approach

Oxygen implantation into silicon at 2.2-3.0E17cm -2 doses and energies 30-40keV has been successfully utilized to produce shallow silicon-on-insulator (SOI) layers using the separation by implantation of oxygen (SIMOX) technique. The SST films were analyzed by cross section transmission electron microscopy (XTEM). High quality superficial silicon and buried oxide layers have been obtained with very sharp interfaces. No defects were observed in the superficial silicon by XTEM and by plan view TEM. Good breakdown voltage of the buried oxide layer has been obtained.