Jun Z. Huang

High-Current Tunneling FETs With (

We propose InAs/GaSb ultrathin-body tunneling field-effect transistors (TFETs) using confinement in the (11̅0) plane and transport in the [110] direction to increase the tunneling probability by reducing the tunnel barrier energy and hole effective mass. To reduce the OFF-state leakage current, we add an InAs/In1-nAlnAs1-nSbn heterojunction to the channel, which increases the valence band barrier. The heterojunction also increases the tunneling probability and ON-current by reducing the tunneling distance through the p-n junction and introducing a resonant state. A fully atomistic non-equilibrium Green function quantum transport approach in NEMO5 is used to explore the design space. While choosing 10-3 A/m OFF-current (IOFF) and a 0.3 V power supply, we simulate 270 A/m ON-current (ION) for a 30-nm gate length and 170 A/m for a 15-nm gate length (Lg), while a conventional 15-nm Lg GaSb/InAs TFET under (001) confinement shows only 24 A/m ION.

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We describe the design of double-gate InAs/GaSb tunneling field-effect transistors (TFETs) using GaSb electron wave reflector(s) in the InAs channel. The reflections from the source p-n junction and from the reflector(s) add destructively, causing the net transmission to approach unity at certain energies. The energy range of transmission enhancement can be broadened by the appropriate placement of multiple barriers. With 10-3 A/m OFF-current (IOFF) and a 0.3 V power supply, the subthreshold swing is improved from 14.4 to 4.6 mV/decade and the ON-current (ION) is improved from 35 to 96 A/m, compared with a conventional GaSb/InAs TFET.

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Future VLSI devices will require low CV_dd²/2 switching energy, large on-currents (I_on), and small off-currents (I_off). Low switching energy requires a low supply voltage V_dd, yet reducing V_dd typically increases /off and reduces the I_on/I_off ratio. Though tunnel FETs (TFETs) have steep subthreshold swings and can operate at a low V_dd, yet their I_on is limited by low tunneling probability. Even with a GaSb/InAs heterojunction (HJ), given a 2nm-thick-channel (001)-confined TFET, [100] transport, and assuming V_dd=0.3V and I_oFF=10^-3A/m, the peak tunneling probability is <;3 % (fig. 1 a) and I_on is only 24 A/m (fig. 1b) [1]. This low I_on will result in large CV_dd/I delay and slow logic operation. Techniques to increase /on include graded AlSb/AlGaSb source HJs [2,3] and tunneling resonant states [4]. We had previously shown that tunneling probability is increased using (11 0) confinement and channel heterojunctions [1], the latter increasing the junction built-in potential and junction field, hence reducing the tunneling distance. Here we propose a triple heterojunction TFET combining these techniques. The triple-HJ design further thins the tunnel barrier to 1.2 nm, and creates two closely aligned resonant states 57meV apart. The tunneling probability is very high, >50% over a 120meV range, and the ballistic I_on is extremely high, 800A/m at 30nm Lg and 475 A/m at 15nm Lg, both with I_off=10^-3 A/m and V_dd=0.3 V. Compared to a (001) GaSb/InAs TFET, the triple-HJ design increases the ballistic /on by 26:1 at 30nm L_g and 19:1 at 15nm L_g. The designs may, however, suffer from increased phonon-assisted tunneling.

Design and Simulation of GaSb/InAs 2D Transmission-Enhanced Tunneling FETs

A triple-heterojunction (3HJ) design is employed to improve p-type InAs/GaSb heterojunction (HJ) tunnel FETs. Atomistic quantum transport simulations show, that the added two HJs (AlInAsSb/InAs in the source and GaSb/AlSb in the channel) significantly shorten the tunnel distance and create two resonant states, greatly improving the ON state tunneling probability. Moreover, the source Fermi degeneracy is reduced by the increased source (AlInAsSb) density of states and the OFF state leakage is reduced by the heavier channel (AlSb) hole effective masses. With VDD = 0.3V and IOFF = 1nA/μm, ballistic ION of 606μA/μm (492μA/μm) is obtained at 30nm (15nm) channel length, which is comparable to n-type 3HJ counterpart and significantly exceeding p-type silicon MOSFET. Simultaneously, the nonlinear turn on and delayed saturation in the output characteristics are also greatly improved.

Extremely high simulated ballistic currents in triple-heterojunction tunnel transistors

We report the design and simulated performance of a GaAsSb/GaSb/InAs/InP n-type triple heterojunction (3-HJ) tunnel field-effect transistor (TFET). GaAsSb/GaSb source and InAs/InP channel HJs both increase the field imposed upon the tunnel junctions and introduce two resonant bound states. The tunneling probability, and hence the transistor on-current, are thereby greatly increased. The devices were simulated using a non-equilibrium Green function quantum transport approach and the k.p method within NEMO5. With 10-3 A/m (IOFF) and a 0.3 V power supply VDD, we simulate 380 A/m ON-current (ION) at 30-nm gate length (Lg) and 275 A/m at 15-nm Lg. Unlike a previously-reported high-current AlGaSb/GaSb/InAs/InGaAsSb 3-HJ design, the GaAsSb/GaSb/InAs/InP design employs channel materials to which high-quality, low-interface-state-density gate dielectrics have been demonstrated.

P-Type Tunnel FETs With Triple Heterojunctions

Ideal, completely coherent quantum transport calculations had predicted that superlattice MOSFETs (SL-MOSFET) may offer steep subthreshold swing performance below 60 mV/dec to around 39 mV/dec. However, the high carrier density in the superlattice source suggests that scattering may significantly degrade the ideal device performance. Such effects of electron scattering and decoherence in the contacts of SL-MOSFETs are examined through a multi-scale quantum transport model developed in NEMO5. This model couples the NEGF-based quantum ballistic transport in the channel to a quantum mechanical density of states dominated reservoir, which is thermalized through strong scattering with local quasi-Fermi levels determined by drift-diffusion transport. The simulations show that scattering increases the electron transmission in the nominally forbidden minigap, therefore, degrading the subthreshold swing (S.S.) and the ON/OFF DC current ratio. This degradation varies with both the scattering rate and the length of ...

High-current InP-based triple heterojunction tunnel transistors

Tunneling heterojunctions (THJs) have confined states close to the tunneling region, which significantly affect their transport properties. Accurate numerical modeling of THJs requires combining the nonequilibrium coherent quantum transport through the tunneling region as well as the quasi-equilibrium statistics arising from the strong scattering in the confined states. In this paper, a novel atomistic model is proposed to include both the effects: the strong scattering in the regions around THJ and the coherent tunneling. The new model matches reasonably well with experimental measurements of Nitride THJ and provides an efficient engineering tool for performance prediction and design of THJ-based devices.

Performance degradation of superlattice MOSFETs due to scattering in the contacts

GaSb/InAs heterojunction tunnel FETs are strong candidates in building future low-power ICs, as they could provide both steep subthreshold swing and large on-state current (ION). However, at short-channel lengths, they suffer from large tunneling leakage originating from the small bandgap and small effective masses of the InAs channel. As proposed in this paper, this problem can be significantly mitigated by reducing the channel thickness, meanwhile retaining a thick source-channel tunnel junction, thus forming a design with a nonuniform body thickness. Because of the quantum confinement, the thin InAs channel offers a large bandgap and large effective masses, reducing the ambipolar and source-to-drain tunneling leakage at off-state. The thick GaSb/InAs tunnel junction, instead, offers a low tunnel barrier and small effective masses, allowing a large tunnel probability at on-state. In addition, the confinement-induced band discontinuity enhances the tunnel electric field and creates a resonant state, further improving ION. Atomistic quantum transport simulations show that ballistic ION = 284 A/m is obtained at 15-nm channel length, IOFF = 1 × 10-3 A/m, and VDD = 0.3 V, while with uniform body thickness, the largest achievable ION is only 25 A/m. Simulations also indicate that this design is scalable to sub-10-nm channel length.

Combination of Equilibrium and Nonequilibrium Carrier Statistics Into an Atomistic Quantum Transport Model for Tunneling Heterojunctions

We explore here the suitability of a mode space tight binding algorithm to various III-V homo- and heterojunction nanowire devices. We show that in III-V materials, the number of unphysical modes to eliminate is very high compared to the Si case previously reported in the literature. Nevertheless, we demonstrate here the possibility to clean III-V mode space basis from the unphysical modes and achieve a significant speed up ratio (>150×), while keeping a very good accuracy (relative error lower than 1%) when using the algorithm for NEGF transport studies. Such results demonstrate the potential of mode space tight binding models and offer unprecedented possibilities for the full band simulation of nanostructures.

Scalable GaSb/InAs Tunnel FETs With Nonuniform Body Thickness

Future ultra-scaled logic and low-power systems require fundamental advances in semiconductor device technology. Due to power constraints, device concepts capable of achieving switching slopes (SS) steeper than 60 mV/decade are essential if scaling of conventional computational architectures is to continue. Likewise, ultra low power systems also benefit from devices capable of maintaining performance under low-voltage operation. Towards this end, tunneling field effect transistors (TFETs) are one promising alternative. While much work has been devoted to realizing TFETs in Si, Ge, and narrow-gap III-V materials, the use of III-N heterostructures and the exploitation of polarization engineering offers some unique opportunities. From physics-based simulations, performance of GaN/InGaN/GaN heterostructure TFETs appear capable of delivering average SS approaching 20 mV/decade over 4 decades of drain current, and on-current densities exceeding 100 μA/μm in aggressively scaled nanowire configurations. Experimental progress towards realizing III-N based TFETs includes demonstration of GaN/InGaN/GaN backward tunnel diodes by both MOCVD and MBE, and nanowires grown selectively by MBE and used as the basis for device fabrication.