June Sugiura

Forming memory transistors with varying gate oxide thicknesses

Semiconductor integrated circuit device with memory MISFETS and thin and thick gate insulator MISFETS

Semiconductor device of an LDD structure having a floating gate

Method of making semiconductor device with memory cells and peripheral transistors

Integrierte halbleiterschaltungsvorrichtung und verfahren zu ihrer herstellung

Semiconductor device equipped with a field effect transistor having a floating gate

Method of making a semiconductor memory device

Semiconductor memory device with additional conductive line to prevent line breakage

Semiconductor memory device with means to prevent word line breakage

A semiconductor memory device with redunant wiring