Jung-eun Lee

A 6-bit 5-GSample/s Nyquist A/D converter in 65nm CMOS

A 6-bit Nyquist A/D converter (ADC) that converts at 5 GHz is reported. Using a wideband track-and-hold amplifier, array averaging, reset switches on analog signal paths, and phase-adjusted clocking for cascaded comparators, a 6-bit flash ADC achieves better than 5 effective bits for input frequencies up to 2.5 GHz at 5 GSample/s. This ADC does not rely on time interleaving, digital calibration, and post data processing for its dynamic performance. Peak INL and DNL are less than 0.7 LSB and 0.6 LSB, respectively. This ADC consumes about 320 mW from 1.3 V at 5 GSample/s. The chip occupies 0.3 mm2 active area, fabricated in 65 nm CMOS.

Impact of ENPP1 and MMP3 gene polymorphisms on aortic calcification in patients with type 2 diabetes in a Korean population

AIMS We investigated whether gene polymorphisms of Ecto-nucleotide pyrophosphatase/phosphodiesterase 1 (ENPP1) and matrix metalloproteinase 3 (MMP3) are associated with increased vascular calcification in patients with type 2 diabetes (T2D) and evaluated whether serum MMP3 and osteoprotegerin (OPG) levels are related to calcification. METHODS This study included 464 subjects: 269 patients with T2D and 195 healthy controls in South Korea. We genotyped subjects for four single nucleotide polymorphisms (SNPs): ENPP1 K121Q, ENPP1 A/G+1044TGA, MMP3 -709A>G and MMP3 -1475G>A. The presence or absence of calcifications in the aortic arch was assessed by plain chest radiography. RESULTS The SNPs ENPP1 K121Q and MMP3 -709A>G showed significant associations with T2D (P=0.001 and P=0.004). The SNP ENPP1 K121Q showed a significant association with aortic arch calcification in T2D (P=0.036). Serum OPG levels were significantly higher in T2D patients than in the control group (P<0.001). However, serum MMP3 levels were significantly lower in T2D patients than in the control group (P<0.001). CONCLUSIONS Our study demonstrates that the ENPP1 K121Q and MMP3 -709A>G polymorphisms are associated with T2D, and that the ENPP1 Q allele is associated with increased aortic arch calcification in a Korean population.

GPU Accelerated Finding of Channels and Tunnels for a Protein Molecule

This paper proposes a novel method for computing the cavities and channels/tunnels in a protein molecule in interactive time without significant user effort. A sphere tree structure is used to represent a protein molecule, which provides a parallel architecture to access a Graphic Processing Unit (GPU) memory. The use of CUDA programming with a GPU then allows the proposed system to work in parallel on either a sphere tree structure of a molecule or a set of voxels composing the space. A real-time performance is achieved for proximity queries on a protein molecule, and an interactive time performance is realized for finding all the cavities and channel/tunnels without user effort. The proposed system also provides a method for approximating a convex hull of a molecule in a discrete space, and then generates the shortest path from a user selected or automatically chosen cavity to the exterior of the protein molecule. Experimental results in comparison with previous methods confirm the time efficiency of the proposed system.

Electromigration Failure Mechanism and Lifetime Expectation for Bi-Modal Distribution in Cu/Low-k Interconnect

The root cause and an approach to lifetime expectation of bi-modal distribution in Cu/low-k interconnect have been elucidated through experimental and simulation results. The early mode with short failure time and voids at via bottom interface, could be explained by pre-existing voids and large current density resulting from gouging via bottom profile. A high compressive SiCN making Cu/SiCN interface near via into tensile stress causes void nucleation in its specified sites, which indicate the late mode. And component lifetime can be predicted using the data obtained only from early failure, because of the same in activation energy and acceleration factor. This comprehension for bi-modal behavior is helpful in EM reliability of technology node beyond 45 nm.

A 1/f-Noise Reduction Architecture for an Operational Amplifier in a 0.13 μm Standard digital CMOS technology

We present new circuit architecture for the 1/f noise reduction in a CMOS Miller operational amplifier. Compared to a reference circuit, the 1/f noise reduction of 7 dB is achieved for a CMOS Miller operational amplifier implemented in a 0.13 μm 1.5 V standard CMOS technology. This architecture successfully reduces the 1/f noise and is applicable to a continuous signal processing analog ICs.

Integration and reliability of a noble TiZr/TiZrN alloy barrier for Cu/low-k interconnects

We have investigated TiZr alloy as a new Cu barrier material for low cost and high performance Cu/low-k interconnects. TiZrN ternary nitride was used as a Cu diffusion barrier and TiZr as an adhesion promotion layer. The issue of metal line resistance shift was suppressed using a novel 2-step annealing procedure. Multi-level Cu metal wiring integration was successfully carried out and the enhanced electrical performance of low via resistance with high via yield was obtained. Improved electromigration and stress-induced voiding resistances also have been demonstrated.

A Fast Hopping Frequency Synthesizer for UWB Systems in a CMOS Technology

A 3 to 5 GHz fast hopping frequency synthesizer for multi-band OFDM UWB applications is designed using a 0.18 mum CMOS technology. The frequency synthesizer operates in the mode 1 bands (centered at 3432 MHz, 3960 MHz, and 4488 MHz). Single-sideband mixer up-converts or down-converts the 528 MHz quadrature signals of ring VCO mixing 3960 MHz LC VCO signals. The sideband suppression is less than -32 dBc for 3432 MHz and -26 dBc for 4488 MHz and band switching time from 4488 MHz to 3432 MHz is measured about 2 ns. Phase noise of the LC VCO and the ring VCO is about -110 dBc/Hz and -98 dBc/Hz at 1 MHz offset frequency, respectively. The total power consumption of the proposed frequency synthesizer is about 68 mW with a 1.8 V supply voltage

Voronoi Diagram Computation for a Molecule Using Graphics Hardware

We present an algorithm that computes a 3 dimensional Voronoi diagram for a protein molecule in this paper. The molecule is represented as a set of spheres with van der Waals radii. The Voronoi diagram is constructed in the 3D space by finding the voxels containing it. For the feasibility of the computation, we represent the molecule as a BVH (bounding volume hierarchy), and our system is accelerated by modern graphics hardware with CUDA programming support. Compared to single-core CPU implementations, experimental results show 323 times faster performance in the computation time, when the space is partitioned into voxels.

Voronoi diagram computation for protein molecules using graphics hardware

We present an interactive algorithm to compute Voronoi diagrams for protein molecules. In the research area of biochemistry, a molecule is generally represented as a set of 3D spheres with various radii. In this paper, we propose a method to compute Voronoi diagrams for a set of spheres in the 3D discrete domain. We achieved interactive construction of Voronoi diagrams through our adaptive subdivision scheme and massively parallel processing supported by current graphics hardware.

Analog Baseband Chain in a 0.18 μm Standard Digital CMOS Technology for IEEE802.15.3a (UWB) Receiver

Today UWB (ultra-wideband) communication is gaining a great attention from consumer electronic-industry and is expected to be adopted for many WPAN (wireless personal area network) applications. UWB (Ultra- wideband) communication standard is based the form of direct sequence or OFDM (orthogonal frequency division multiplexing) for high-date-rate application like IEEE 802.15.3a [1]. This paper demonstrates a successful implementation and experimental verification of a CMOS analog baseband chain - variable gain amplifier and low pass filter - for a UWB wireless PAN (personal area network) receiver in a 0.18 μm CMOS process. The experiments features 40 dB linear scaled output gain and a total current of 30 mA.