Junichiro Kadomoto

10.1 A 6Gb/s 6pJ/b 5mm-distance non-contact interface for modular smartphones using two-fold transmission-line coupler and EMC-qualified pulse transceiver

Modular smart phones have been attracting attention (Fig. 10.1.1) because users can freely customize their phones by purchasing modules and assembling them [1]. The transfer of data between modules is accomplished by non-contact connectors. Because the connection electrodes are not exposed, there is no wear or damage and waterproofing is possible. The methods of constructing non-contact connectors include capacitive coupling, which uses flat plate electrodes [1], magnetic coupling, which uses coils [2-4], and electromagnetic coupling, which uses transmission-line couplers (TLC) [5-7]. Capacitive and magnetic coupling can be used only for narrowband communication below the resonance frequency (<;1GHz). Because impedance varies with frequency, impedance matching is not possible for digital signals that include a wide range of frequency components. For that reason, these couplers can be used for the MIPI D-PHY data rate (1Gb/s), but not for M-PHY (6Gb/s). The TLC, however, can be used for broadband communication (>6GHz). Because the impedance is constant, there is little reflection and digital communication is possible. A data transfer speed of 12Gb/s has been reported for a distance of 1mm between couplers [5]. Thus, full HD (4Gb/s) or 4K (15Gb/s) video data can be transmitted over a small number of lanes.

QUEST: A 7.49TOPS multi-purpose log-quantized DNN inference engine stacked on 96MB 3D SRAM using inductive-coupling technology in 40nm CMOS

A key consideration for deep neural network (DNN) inference accelerators is the need for large and high-bandwidth external memories. Although an architectural concept for stacking a DNN accelerator with DRAMs has been proposed previously, long DRAM latency remains problematic and limits the performance [1]. Recent algorithm-level optimizations, such as network pruning and compression, have shown success in reducing the DNN memory size [2]; however, since networks become irregular and sparse, they induce an additional need for agile random accesses to the memory systems.

A Practical Collision Avoidance Method for an Inter-Chip Bus with Wireless Inductive through Chip Interface

One of the benefits of wireless inductive through chip interface is that it allows to build a shared bus just by placing a coil on the same location in each chip. Since providing dedicated channels for arbitration is expensive, carrier sense multiple access with collision detection (CSMA/CD) is hopeful as the bus control method. Here, a rotationpersistent collision avoidance algorithm dedicated for the wireless inter-chip bus is proposed. In the method, after the carrier sense, only a specific chip can instantly send the data, and others must wait for a random time interval. It improved the throughput of 1-persistent CSMA/CD by 33% on average.

An inductive-coupling link for 3-D Network-on-Chips

An inductive-coupling link for 3-D network-on-chips (NoC) is presented. Inductively coupled coils allow high-speed wireless communication between stacked chips. 35-bit parallel input data are serialized and transmitted. Silicon measurements from test chips implementing transceiver circuits, in 65 nm SOI CMOS technology demonstrate 875 Mb/s operation.

A 1 Tb/s/mm 2 inductive-coupling side-by-side chip link

An inductive coupling technique for wireless interconnection of side-by-side chips within a package is presented. Data is transferred by using changes in magnetic field that occur when the current in coils on the chips is switched off. The circuit layout area and power consumption of transceivers have respectively been reduced to 1/3 and 1/6. A world-leading transmission rate of 1 Tb/s/mm2, which is faster by a factor of 3, has been achieved with a 0.18 μm CMOS test chip.

An inductive-coupling bus with collision detection scheme using magnetic field variation for 3-D network-on-chips

A wireless vertical bus with collision detection scheme for 3-D network-on-chips (NoC) is presented. Utilizing inductive-coupling between coils, wireless connection between all stacked chips is established. Data collision is detected by sensing magnetic field variation. A test chip is fabricated in 65 nm SOI CMOS technology. A data rate of 0.8 Gb/s with a BER < 10−12 is achieved. The energy efficiency is better than 1.4 pJ/b. A collision detection circuit is implemented and its operation is confirmed.

Analytical thruchip inductive coupling channel design optimization

ThruChip interface (TCI) is an emerging 3-D integrated circuit stacking technology. TCI utilizes on-chip inductor to build vertical communication channel in near field distance and has been proved to stand comparison with through-siliconvia (TSV) in data rate, power, and reliability. Moreover, it is also cost-effective in manufacturing due to its wireless nature. In this paper, an analytical method is proposed to find near-optimal TCI inductive coupling channel solution. The experiment results show an average 16.8% transmitting current reduction and shrink design time from days to a few minutes.

A 6 Gb/s 6 pJ/b 5 mm-Distance Non-Contact Interface for Modular Smartphones Using Two-Fold Transmission Line Coupler and High EMC Tolerant Pulse Transceiver

A non-contact interface for modular smartphones that can provide a data connection at a maximum MIPI rate of 6 Gb/s has been developed. A two-fold transmission line coupler, which is a small-size coupler that has a wide bandwidth, is proposed for modular smartphones, where the layout area is strictly limited. The coupler size is 6 mm2 for a 5 mm communication distance, which is 1/24 smaller than the conventional coupler. Since many wireless communication components, such as LTE, WiFi, and GPS transceivers, are assembled in a small module, the interference between the non-contact interface and the wireless transceivers should be suppressed. To improve noise immunity and reduce unwanted radiation from the coupler, an electromagnetic-compatibility robust pulse transceiver is proposed. A synchronous receiver using an edge counting clock recovery circuit improves noise immunity, and a bi-phase pulse transmitter reduces noise radiation in the GPS band. There is no EMS by LTE or WiFi signals on the data connection at BER <; 10-12 when the coupler is separated by a distance of 2 mm and no EMI on GPS signals at a separation of 10 mm. Compared with the state-of-the-art result, the highest energy efficiency (6 pJ/b) and space efficiency (1.2 mm2/1 mm distance) is achieved.

3D integration using inductive coupling and coupled resonator (Invited)

This paper describes a wireless inter-chip link using inductive coupling, namely ThruChip Interface (TCI) and a low-skew 3D clock distribution network using coupled resonator. Applying a TCI and a coupled resonator make it possible to integrate chips three dimensionally by applying conventional CMOS technology without new additional processing. Although the additional cost of a TCI is much lower than that of a through-silicon via (TSV), speed, power, reliability, and testability are not compromised.