Atsutake Kosuge

A 7Gb/s/link non-contact memory module for multi-drop bus system using energy-equipartitioned coupled transmission line

As computing power and speed increases, the demand for higher memory bandwidth increases as well. Recently, the memory interface has been improved up to 20Gb/s/link [1]. Considering PCB routing area, a multi-drop bus architecture is still preferable for large memory capacity to the point-to-point connection. However, the multi-drop approach suffers from performance degradations due to reflections at each stub. To mitigate this problem, reference [2] proposes an impedance-matched bidirectional multi-drop DQ bus architecture that is difficult to realize due to smaller series resistor if more than 4 modules are used. To avoid multi-reflections from each stub, other approaches have used coupled transmission lines (CTL) [3, 4]. While a horizontal directional coupler buried in the PCB was used [3], coupled traces on the bent loop of flex fixed to a module were used for signal delivery in vertical direction [4]. In [3], a long coupler with long main bus line was used so that the signal integrity degrades at the far-end coupler. In [4], the coupling traces on the motherboard and the flex have zigzag geometries for better misalignment tolerance, which result in large area of routing due to the minimum required pitch between traces. In [5], the CTL needs to be placed close to a Tx/Rx chip, as there are no extended transmission lines for signal lead. Therefore, it cannot be used for memory modules. DRAM multi-drop bus interface technology mapping is described in Fig. 2.8.1.

A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched transmission line couplers and Dicode partial-response channel transceivers

A reduced-reflection multi-drop bus system using Dicode (1-D) partial response signaling transceiver is presented for the first time in the world. Directional couplers on transmission lines arranged with equi-energy distributing and exact impedance matched conditions allow the bus to reach to 12.5Gbps/link speed. The transmission line has 5-convex portions to form one side of a coupler where the transmission line width is adjusted to control the characteristic impedance of the coupling section, minimizing signal reflection from each section. Dicode partial-response signaling method with a half-rate architecture was used where a precoder is placed in the transmitter to make the signal best fit for the channel to eliminate inter symbol interference (ISI) where the test chip transmitter occupies 3,750 μm2 and the receiver occupies 750 μm2 with 90nm CMOS technology, consuming 40mA and 23mA respectively at the supply voltage of 1.2V.

10.1 A 6Gb/s 6pJ/b 5mm-distance non-contact interface for modular smartphones using two-fold transmission-line coupler and EMC-qualified pulse transceiver

Modular smart phones have been attracting attention (Fig. 10.1.1) because users can freely customize their phones by purchasing modules and assembling them [1]. The transfer of data between modules is accomplished by non-contact connectors. Because the connection electrodes are not exposed, there is no wear or damage and waterproofing is possible. The methods of constructing non-contact connectors include capacitive coupling, which uses flat plate electrodes [1], magnetic coupling, which uses coils [2-4], and electromagnetic coupling, which uses transmission-line couplers (TLC) [5-7]. Capacitive and magnetic coupling can be used only for narrowband communication below the resonance frequency (<;1GHz). Because impedance varies with frequency, impedance matching is not possible for digital signals that include a wide range of frequency components. For that reason, these couplers can be used for the MIPI D-PHY data rate (1Gb/s), but not for M-PHY (6Gb/s). The TLC, however, can be used for broadband communication (>6GHz). Because the impedance is constant, there is little reflection and digital communication is possible. A data transfer speed of 12Gb/s has been reported for a distance of 1mm between couplers [5]. Thus, full HD (4Gb/s) or 4K (15Gb/s) video data can be transmitted over a small number of lanes.

Analysis and Design of an 8.5-Gb/s/Link Multi-Drop Bus Using Energy-Equipartitioned Transmission Line Couplers

An 8.5-Gb/s/link non-contact multi-drop bus is presented. The signal reflections that limit the data rates of conventional multi-drop bus interfaces are dramatically reduced by using transmission line couplers at each signal branching point. As an energy-equipartitioned technique provides the same signal level to every port, wider receiver margin is achieved. The data rate is improved by 1.8 times compared to the most advanced multi-drop bus interface. The theoretical analysis and design techniques of energy-equipartitioned transmission line couplers are discussed in this paper. The design methodologies were verified through simulations performed by using a full-3D EM-simulator and experiments with FR4 test boards. Due to the low-cut characteristics of the couplers, the low-frequency components are cut off so that differentiated pulses arrive at the receiver input point. A receiver detects and recovers the received pulses by integrating them using hysteresis characteristics. The design techniques of the transceiver for the transmission line couplers are also discussed in this paper. The proposed methods were verified by using a test chip fabricated with a 90-nm CMOS process. Experiments with a prototype of an eight-drop multi-drop bus system confirmed at a data rate of 8.5-Gb/s/link. The measured timing margin at the far-end module was 0.49-UI at a BER of 10-12. The power consumption of the transceiver was 75.6-mW at a supply voltage of 1.2-V.

30.6 An electromagnetic clip connector for in-vehicle LAN to reduce wire harness weight by 30%

Heavier wire harnesses decrease the fuel efficiency of vehicles. The number of wires has increased sharply with presently over one hundred electronic control units (ECUs). Connectors also add to the weight (Fig. 30.6.1(a)). The connectors used in vehicles occupy a considerable space because heavy protection is required against transmission interruption caused by vibration. In addition, a significant number of wires are used together in a junction box to increase total wire length (e.g. 55L when 10 ECUs are connected) and thus weight increases accordingly.

A 0.15mm-thick non-contact connector for MIPI using vertical directional coupler

As silicon chip performance continues to increase, the interconnection capabilities should also be improved to achieve higher overall system performance. This paper proposes a new, small-size and high-speed non-contact interconnect between printed circuit boards (PCBs) using a vertical directional coupler (VDC), which has actually been applied to a liquid crystal display (LCD) driver board. The feasibility of a millimeter-range non-contact interface using a directional coupler was studied previously [1]. In this paper, two signal ports have been implemented in one coupler by best utilizing the characteristics of VDC. The coupler size is 5mm × 2.25mm, and the gap between the couplers is about 75μm, which corresponds to the twofold thickness of a soldering resist on PCB and the adhesive material in between. The transmitter transforms the data sequence from Non-Return-to-Zero (NRZ) into pulses in order to reduce the level of DC components. This achieves a power saving of 1.47pJ/b, and the pulses are sent to the coupler in differential mode to prevent electromagnetic interference (EMI). The measured speed was 4.6Gb/s per coupler to achieve the MIPIs maximum speed of 6Gb/s with two couplers. Conventional connectors have housings to protect contact elements or to provide mechanical support for plug-in and out. However, these housings make it difficult to achieve the smallest possible systems because they require extra space. In addition, they sometimes make the PCB trace longer, which deteriorates the maximum data rate. The method we have developed involves delineating VDC on PCB or a flexible printed circuit (FPC) to connect boards without housings and with the minimum distance. As a result, this interconnect scheme is advantageous not only because it saves space but also because it makes it easier to build systems, even those that contain a large number of built-in connectors. Thus, the proposed non-contact interconnect is suitable for future small-size systems.

An Inductively Powered Wireless Solid-State Drive System With Merged Error Correction of High-Speed Wireless Data Links and NAND Flash Memories

A highly reliable wireless solid-state drive (SSD) system for future applications of large volume storage is presented. The wireless interface in the system consists of an inductively coupled power link with fast transmission power control and high-speed data links using transmission line couplers (TLCs). The wireless power link can deliver 1 W from the host to the SSD. The full duplex wireless data interface achieves raw data rate of 1.6 Gb/s. The reliability of the wireless interface is studied though simulation analysis and experiments. The error correction block for the NAND flash memory system can also correct errors in the wireless data links, allowing the requirements for the PHY layer to be relaxed. The error correction code is discussed, including optimization by analyzing the error bits on the wireless data links. The experimental results confirmed strong tolerance to the interference from the power link on the wireless data link, and the water proof property of both the data and power links.

A 0.15-mm-Thick Noncontact Connector for MIPI Using a Vertical Directional Coupler

A noncontact and housing-less thin-thick connecting method was developed for mobile industry processor interface (MIPI) applications. This paper describes the worlds first 0.15-mm-thick connector using a vertical directional coupler (VDC) which enables simultaneous two-link communication with one coupler without fatal performance degradation. We have analyzed the conditions for isolating two links in a coupler, and the design method is discussed. A fully balanced pulse transmitter implemented in 90-nm CMOS technology significantly suppressed electromagnetic interference (EMI), which agrees well with MIPI requirements. An experimental liquid crystal display interface system reached a maximum data rate of 2.3 Gb/s/link at a bit error rate of less than 10-12 and a power consumption of 1.47 pJ/b. The timing margin of single link was 320 ps ( =64% U.I.) and of two links was 305 ps ( =61% U.I.) at 2.0 Gb/s.

Inductively-powered wireless solid-state drive (SSD) system with merged error correction of high-speed non-contact data links and NAND flash memory

This paper presents a wireless solid-state drive (SSD) system for future applications of large volume storage in mobile devices or data centers. The wireless interface in the developed system consists of an inductive-coupling power link with a fast transmitting power control and high-speed data links with transmission line couplers (TLCs). The wireless power link can deliver 1W from the host side to the SSD side. The full duplex wireless data interface achieved raw data rate of 1.6Gbps/link. The error correction block for NAND flash memory system can also correct the error in wireless data links. The data link has tolerance to the interference from the power link, and both the data and power links show the waterproof property of the system.

24.4 A 6.5Gb/s Shared bus using electromagnetic connectors for downsizing and lightening satellite processor system by 60%

Processor systems that are mounted in satellites must be small and light, having high data transfer rates, and high storage capacity [1]. A small reduction in size and weight could reduce the cost of launching a satellite by a significant amount. The next generation of earth observation satellites will require data transmission rates to a maximum of 20Gb/s and at least one terabyte of storage capacity. The volume, weight, and communication speed of the processor system is determined by the backplane connectors (Fig. 20.4.1). It is difficult to achieve a connector that can pass signals of 2.5Gb/s or more. The signal reflection that occurs when signals are branched at connectors and at the wire stubs of branches decreases the transmission speed, so only point-to-point connections are possible. Once the satellite is launched, repair or replacement is not possible, and system redundancy is introduced. Accordingly, 512 backplane wires would be required. The signal connector would require 1,024pins, including the ground pins used to prevent crosstalk, and would be 512mm wide, which is even wider than the circuit board of each module.