K. Kimoto

Gaussian Monocycle Pulse Transmitter Using 0.18

A single-chip Gaussian monocycle pulse (GMP) transmitter using 0.18 mum CMOS technology with an on-chip integrated antenna was developed for inter-chip ultra-wideband (UWB) communication. Ultra-short GMP signals of 280 ps duration, -20.2 dB ringing level and 3.6 GHz center frequency were generated with the power consumption of 12.6 mW at 1.8 V. Intra- and inter-chip transmissions and receptions of the generated GMP were successfully demonstrated at a pulse repetition rate of 1.16 Gb/s by use of on-ship integrated dipole antennas.

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A single-chip ultra-wideband (UWB) receiver was developed using 0.18 mum CMOS technology, and inter-chip wireless data communication by integrated antennas was confirmed. Timing pulse and data pulse with on-off keying were alternately sent from a transmitting antenna. Double Gaussian monocycle pulse (GMP) template generators performed detections of timing and data pulses. A single GMP template, whose probability distribution of the pulse repetition cycle is given by Gaussian, showed a random jitter of 4.87 ps. Dual-Dirac model could explain the probability distribution of the cycle of double GMP template. Obtained random jitter and deterministic jitter were 4.6 ps and 14.4 ps, respectively. The receiver successfully recovered 200 Mbps data at the distance of 0.5 mm.

CMOS Technology With On-Chip Integrated Antennas for Inter-Chip UWB Communication

Ultrawideband characteristics of Sierpinski carpet fractal antennas fabricated on silicon substrates with the resistivities of 2290, 79.6, and 10 /spl Omega//spl middot/cm were investigated. The return losses lower than -10 dB and high transmission gains of approximately -14 dB were obtained for the antennas with 10-mm distance on the Si substrate with the resistivity of 2290 /spl Omega//spl middot/cm in the frequency range from 18 to 26.5 GHz. Gaussian monocycle pulses with 70 ps pulsewidth were transmitted in the Si substrates successfully and the corresponding voltage gains were -23, -26, and -39 dB for the Si resistivities of 2290, 79.6, and 10 /spl Omega//spl middot/cm, respectively.

A Single-Chip Ultra-Wideband Receiver With Silicon Integrated Antennas for Inter-Chip Wireless Interconnection

A 3D integration custom stack system utilizing a local wireless interconnect (LWI) and a global wireless interconnect (GWI) is proposed. The LWI transfers Gb/s pulses using resonant coupling of spiral inductors with low-power dissipation of several mW. The GWI transfers global clocks and data on a 20 GHz signal using on-chip antennas.

Ultrawideband characteristics of fractal dipole antennas integrated on Si for ULSI wireless interconnects

For our investigation of UWB dipole antennas as integrated circuit wireless interconnects, a pair of aluminum dipole antennas were fabricated on oxidized Si substrates with resistivity of 10 /spl Omega/.cm. Their feature sizes are: 1.0-6.0 mm length; 10 /spl mu/m width; 3.0 mm separation; 1 /spl mu/m thickness. A transmitter dipole antenna was driven by a Gaussian pulse or monocycle pulse. The pulse shape at the receiver dipole antenna was measured by a sampling oscilloscope through baluns, 180/spl deg/ hybrid couplers. It was found that the received waveform was the time derivative of the input Gaussian pulse because two baluns in the measurement circuit acted as time derivative devices. Consequently, the transmitter antenna input waveform and the receiver antenna output waveform were found to be identical, so that the Si integrated antennas could be used for UWB communication in an integrated circuit chip with Gaussian pulses.

A 3D integration scheme utilizing wireless interconnections for implementing hyper brains

Performance of integrated dipole antennas on Si substrates was investigated for inter-chip signal transmission in wireless interconnections for Si ultra-large scale integrated circuits (ULSI). Linear dipole antennas 4 mm long were fabricated on P-type Si substrates with a resistivity of 10 Ωcm in an inter-chip stacked structure. Inter-chip antenna transmission gains were measured for the dipole antennas at a vertical distance of 2.86 mm and a horizontal distance of 3 mm when Si substrates with a resistivity of 2.29 kΩcm were inserted. A transmission gain of -30 dB and no dependence on vertical distance were observed. Gaussian monocycle pulses with a pulse width of 70 psec could be transmitted successfully in the inter-chip stacked structure. Antenna transmission gain and peak-to-peak voltage between Si chips were improved using a high resistivity Si substrate.

Transient characteristics of integrated dipole antennas on silicon for ultra wideband wireless interconnects

13.5 Gbps ultra-wideband signal transmission on Si chips was demonstrated by wireless interconnects using silicon integrated linear dipole antennas. 128 bit pseudo random binary signal was generated at 13.5 Gbps and transmitted as Gaussian monocycle pulse trains from the integrated dipole antenna. Received signals were successfully recovered as 128 bit binary signals with the bit error rate of 1.6times10-2

Transmission Characteristics of Gaussian Monocycle Pulses for Inter-Chip Wireless Interconnections Using Integrated Antennas

Chip-to-chip ultrawideband (UWB) wireless interconnections are essential for reducing resistance capacitance (RC) delay in wired interconnections and three-dimensional (3D) highly integrated packaging. In this study, we demonstrated a wireless interchip signal transmission between two on-chip meander antennas on printed circuit board (PCB) for 1 to 20 mm transmission distances where the low power gain of each antenna due to a lossy Si substrate has been amplified by a low-noise amplifier (LNA). The measured result shows that the LNA produces 26 dB of improvement in antenna power gain at 4.5 GHz on a lossy Si substrate. Moreover, a Gaussian monocycle pulse with a center frequency of 2.75 GHz was also received by an on-chip antenna and amplified by the LNA. The LNA was integrated with an on-chip antenna on a Si substrate with a resistivity of 10 Ωcm using 180 nm complementary metal–oxide–semiconductor (CMOS) technology. The investigated system is required for future single chip transceiver front ends, integrated with an on-chip antenna for 3D mounting on a printed circuit (PC) board.

Data transmission characteristics of integrated linear dipole antennas for UWB communication in Si ULSI

A Si on-chip bow-tie antenna array was developed for transmitting Gaussian monocycle pulses (GMPs) whose center frequency was 15 GHz. The length and flare angle of the bow-tie antenna were 7.16 mm and 53°, respectively. GMPs were emitted from the antenna to the substrate whose dielectric constant was 7 and reflected at the target whose dielectric constant was 30. A minimum dielectric target size of 3×3 mm2 at a depth of 20 mm in the dielectric substrate was detected and a two-dimensional cross-sectional image of a dielectric target in a dielectric substrate was reconstructed by confocal imaging algorithm.

A 3.5–4.5 GHz Complementary Metal–Oxide–Semiconductor Ultrawideband Receiver Frontend Low-Noise Amplifier with On-Chip Integrated Antenna for Interchip Communication

Confocal algorism using microwave propagation is a promising candidate for the early-stage breast cancer detection. In this paper, the dipole antenna and the quasi Yagi-Uda antenna were fabricated on printed circuit boards (PCB) for detecting targets in a dielectric substrate. The Yagi-Uda antenna showed the higher resolution of confocal imaging than the dipole antenna.