K Van der Zanden

Metamorphic InGaAs/InAlAs quantum well structures grown on GaAs substrates for high electron mobility transistor applications

Modulation-doped In0.5Ga0.5As/In0.5Al0.5As quantum well structures grown by molecular beam epitaxy on GaAs substrates using a relaxed AlGaAsSb buffer showed carrier mobilities of 8500 cm2/V s for a sheet concentration of 3.5×1012 cm−2 at room temperature. The crystallinity of the quaternary buffer layer was verified by x-ray diffractometry. Transistors with 0.25×100 μm2 gates demonstrated transconductance values as high as 800 mS/mm. S-parameter measurements revealed a cutoff frequency fT of 87 GHz and a maximum oscillation frequency fMAX of 140 GHz (both extrinsic values).

Root Cause of Charge Loss in a Nitride-Based Localized Trapping Memory Cell

Data retention loss mechanisms in nitride-based localized trapping memory devices are investigated with various electrical measurements and Medici simulations. First, the effect of program and erase cycles on device behavior is determined in terms of bottom oxide degradation and nitride charge profile evolution. Even if a strong degradation of the interface is observed, there is no important impact of this degradation on the cell behavior. However, the nitride charge profile evolves with cycling and leads to a three-pole electron-hole-electron profile over the channel region. Second, the interface trap annealing, the tunneling through the bottom oxide, and the lateral redistribution are studied in order to determine which mechanism plays the main role in the threshold voltage shift after cycling. The retention performance is dominated by a lateral redistribution of charges in the nitride layer.

On the correlation between drain-gate breakdown voltage and hot-electron reliability in InP HEMTs

By comparing devices with different recess widths, we show that the off-state drain-gate breakdown voltage (BV/sub DG/) may give totally misleading indications on the reliability of lattice-matched InP HEMTs under hot-electron (HE) and impact ionization conditions, from both standpoints of gradual and catastrophic degradation. Since the hot-electron degradation effects observed in our HEMTs are quite common, we believe that our results should be considered as a general caveat whenever indications on HE HEMT robustness are inferred from BV/sub DG/ measurements.

W-band high-gain amplifier using InP dual-gate HEMT technology

High Electron Mobility Transistors (HEMTs) based on InP have proven to be the best performing three terminal devices at millimetre frequencies. This makes them an attractive alternative for MESFET technology to be incorporated in monolithic microwave integrated circuits (MMIC) with operating frequencies up to 100 GHz and beyond. In this paper we first present a coplanar technology for fabrication of InP HEMTs as well as passive components, involved in MMICs. A W-band high-gain amplifier based on this technology was designed and realised and results are presented, demonstrating the capabilities of InP HEMTs at frequencies in the range of 100 GHz.

Easy and accurate empirical transistor model parameter estimation from vectorial large-signal measurements

The standard empirical nonlinear model parameter estimation is often cumbersome as several measurement systems are involved. We show that the model generation complexity can be reduced tremendously by only using full two-port vectorial large-signal measurements. Furthermore, realistic operating conditions can easily be included in the optimisation procedure, as we illustrate on GaAs PHEMTs.

New Operating Mode Based on Electron/Hole Profile Matching in Nitride-Based Nonvolatile Memories

A new operating mode for the nitride-based nonvolatile memory cells using channel hot electron injection for programming and hot hole injection for erasing is presented. The mismatch between the injected electron and hole profiles during programming and erasing operations, which limits the performance of the device, can be prevented. The profiles, extracted from charge-pumping measurements, are tuned by changing the operating voltages in order to have matched distributions. Substantial improvements in endurance and subsequent high-temperature data retention are demonstrated

Reliability testing of InP HEMT's using electrical stress methods

In this paper, we discuss the results of three different electrical stress tests on InP-based HEMTs and their implications toward reliability. These are hot electron (HE) stress, transmission line pulse (TLP) measurements, and RF overdrive stress. Some processing parameters have been varied to investigate their influence on reliability issues. HE stress is performed on a set of Si/sub 3/N/sub 4/ passivated devices with increasing recess width. Degradation is observed to be largely dependent on recess width, due to changes at the InAlAs-Si/sub 3/N/sub 4/ interface. With TLP measurements, an ESD-like reliability study is performed on devices with different types of Schottky barriers. Although epilayers with In/sub 0.40/Al/sub 0.00/ as Schottky material show improved breakdown and leakage characteristics over In/sub 0.52/Al/sub 0.48/As, pulsed stress tests reveal an earlier breakdown. Finally, the degradation under large-signal RF overdrive stress is determined with a nonlinear network measurement system (NNMS). Both on- and off-state degradation are studied with this set-up. Results appeared to be strongly dependent on the phase difference between the stress voltage waves applied at the device ports.

Improved HEMT model for low phase-noise InP-based MMIC oscillators

This paper focuses on two modeling aspects to improve the accuracy of low phase-noise monolithic-microwave integrated-circuit (MMIC) oscillator design. Up until now, the modeling of InP-based high electron mobility transistors (HEMTs) has mainly been limited to the representation of small-signal and thermal noise behavior. In this paper, we present a scaleable nonlinear and bias-dependent low-frequency (LF) noise model.

Low-frequency drain current noise behavior of InP based MODFET's in the linear and saturation regime

This paper describes a detailed experimental study of the low-frequency (LF) drain current noise behavior of InP based MODFETs in a broad operation regime, spanning both linear and saturation operation. The noise power spectral density S/sub lD/ of the predominantly 1/f noise is studied as a function of the gate and drain bias. The experimental noise behavior is compared with available analytical models. It is shown that there is a reasonable agreement between the data and the theoretical models in linear operation. However, no accurate theory exists for the saturation regime. Therefore, an empirical analytical description is proposed, which provides a good approximation for the measurement data base. Furthermore, it can be used as a starting point for phase noise simulations in high-frequency nonlinear circuits.

The effect of passivation on the hot electron degradation of lattice-matched InAlAs/InGaAs/InP HEMTs

Our results indicate that under hot electron conditions both SiN-passivated and bare InP HEMTs have a tendency to degrade from the point of view of dc and rf characteristics. Passivated devices show a permanent decrease of drain current and transconductance at high gate bias. The degradation is attributed to negative charge accumulation at the surface leading to cap depletion, and tends to be weaker in selectively etched gate devices, where the cap is laterally etched away much more. This dc effect is mirrored by a reduction of the current gain cutoff frequency in the same bias range. Bare HEMTs display a variety of degradation modes, depending on the particular device geometrical and process features. The gate recess process, as can be expected, is particularly critical from this standpoint.