Kaige G. Sun

Low-Voltage Double-Gate ZnO Thin-Film Transistor Circuits

In this letter, we report double-gate ZnO thin-film transistor (TFT) circuits deposited by plasma-enhanced atomic layer deposition that are suitable for low-voltage operation. Compared to bottom-gate-only ZnO TFTs, double-gate ZnO TFTs have improved mobility, subthreshold slope, and bias stability. In this letter, the TFT top gate is used to adjust the bottom-gate turn-on and threshold voltage. This allows the logic transition point for circuits to be adjusted for operation at a low voltage. Using this approach, high-gain inverters (gain >100) and low-voltage ring oscillators using double-gate TFTs have been demonstrated. Double-gate inverters with a beta ratio of 5 have a gain larger than 100. Fifteen-stage double-gate ZnO TFT ring oscillators operate with VDD = 1.5 V, ID = 28 μA, and propagation delay of 2 μs per stage.

Controlling Chain Conformations of High-k Fluoropolymer Dielectrics to Enhance Charge Mobilities in Rubrene Single-Crystal Field-Effect Transistors.

A novel photopatternable high-k fluoropolymer, poly(vinylidene fluoride-bromotrifluoroethylene) P(VDF-BTFE), with a dielectric constant (k) between 8 and 11 is demonstrated in thin-film transistors. Crosslinking P(VDF-BTFE) reduces energetic disorder at the dielectric-semiconductor interface by controlling the chain conformations of P(VDF-BTFE), thereby leading to approximately a threefold enhancement in the charge mobility of rubrene single-crystal field-effect transistors.

pH-Controlled Selective Etching of Al2O3 over ZnO

We describe pH-controlled selective etching of atomic layer deposition (ALD) Al2O3 over ZnO. Film thickness as a function of etch exposure was measured by spectroscopic ellipsometry. We find that alkaline aqueous solutions with pH between about 9 and 12 will etch Al2O3 at useful rate with minimal attack of ZnO. Highly selective etching of Al2O3 over ZnO (selectivity >400:1) and an Al2O3 etch rate of ∼50 nm/min can be obtained using a pH 12 etch solution at 60 °C.

Trilayer ZnO Thin-Film Transistors With In Situ

In this letter, we report trilayer ZnO thin-film transistors (TFTs) with in situ Al₂O₃ passivation fabricated using plasma-enhanced atomic layer deposition. The bottom-gate, top-contact TFTs use an Al₂O₃-ZnO-Al₂O₃ trilayer deposited in one deposition run at 200°C that provides protection for the active layer back surface with no extra passivation step. Compared with Al₂O₃ passivated, nontrilayer ZnO TFTs, these trilayer devices have similar field effect mobility, but more positive turn-on voltage and improved bias stability. Seven-stage trilayer ZnO TFT ring oscillators operated at 3.5 MHz at a supply voltage of 17 V, corresponding to a propagation delay of ~ 27 ns/stage.

{\rm Al}_{2}{\rm O}_{3}

Vertical zinc oxide (ZnO) thin-film transistors (TFTs) with submicrometer channel length have good performance, including large current density (>10 mA/mm), high mobility (> 14 cm2/Vs), and large current ON-OFF ratio (>107). They also have asymmetric current-voltage (I-V) characteristics in the saturation region when the source and drain electrodes are interchanged. We have used 2-D simulations with the Synopsis Sentaurus Device to model vertical ZnO TFTs. The devices studied in this paper had ZnO active layers deposited using spatial atomic layer deposition (SALD). Model parameters were calibrated by matching simulation results with experimental results of planar bottom-gate ZnO TFTs and further adjusted to fit vertical TFT (VTFT) experimental characteristics. We find we need acceptor-like traps above and below the conduction band minimum to model the SALD ZnO semiconductor behavior; in this paper, we introduced these as bulk traps. We find the asymmetric I-V characteristics arise from an ungated region near the foot of the VTFT, and which has a more significant effect on charge injection than on charge extraction. Modeling TFTs with different ungated region lengths gave good agreement with experimental characteristics.

Passivation

We report here double-gate ZnO thin film transistor (TFT) circuits with operation at low voltage. TFTs with low voltage operation have been reported previously, but often use very thin (few nm thick) gate dielectric which may limit manufacturability. Oxide semiconductor-based TFTs have been extensively studied as competitive candidates for next-generation display technology and other large-area electronics. For many applications, operation at voltages compatible with low-voltage CMOS is important. Doublegate TFTs are of interest because they allow threshold voltage tuning, improved device performance, and circuit applications like mixers. We have previously reported bottom-gate ZnO TFTs and circuits fabricated on glass and flexible polymeric substrates using plasma enhanced atomic layer deposition (PEALD). Here we report double-gate ZnO TFTs and circuits fabricated on glass substrates using PEALD with a maximum process temperature of 200 °C. Compared to bottom-gate ZnO TFTs, doublegate ZnO TFTs have higher mobility, and reduced substhreshold slope. In these devices, the top gate can be used to vary the bottom-gate threshold voltage by more than 4 V. This allows the logic transition point for circuits to be adjusted as desired and allows logic operation at low voltage. 15 stage double-gate ZnO TFT ring oscillators operate well with VDD = 1.2 V, ID = 32 μA, and propagation delay of 2.1 μs/stage.

Modeling of Self-Aligned Vertical ZnO Thin-Film Transistors

This letter reports a low-power full-wave active rectifier using double-gate ZnO thin-film transistors (TFTs). The active rectifier is designed to operate at low voltage and low power to allow integration with mechanical energy harvesters. Double-gate TFTs allow the TFT threshold voltage to be tuned and enable enhancement/depletion-mode circuits with high gain and low power consumption. The active rectifier is designed to work with input voltage as small as 200-mV peak-to-peak and frequencies up to 4 Hz. The active rectifier circuit includes 12 TFTs and operates with a power consumption <;150 nW. The low fabrication temperature for the active rectifier circuit allows direct and distributed integration with micro-electromechanical energy harvesters.

Low-voltage ZnO double-gate thin film transistor circuits

We have fabricated ZnO thin film transistors (TFTs) on rigid and flexible substrates with characteristics well suited for displays and more general microelectronic applications. Using weak-reactant plasma enhanced atomic layer deposition (PEALD) we have fabricated single-gate, double-gate, and trilayer ZnO TFTs with good performance and stability. We have also fabricated TFTs and circuits on thin (few μm thick) solution-cast polymeric substrates that can be flexed to small radius for thousands of cycles.

Low-Power Double-Gate ZnO TFT Active Rectifier

Summary form only given. Vertical thin film transistors (VTFTs) achieve sub-micron channel length without expensive high-resolution photolithography by taking advantage of a three-dimensional device structure. Recently, ZnO VTFTs with active layers deposited by spatial atomic layer deposition (SALD) were demonstrated with large current density (10 mA/mm), high mobility (>14 cm2/Vs) and large on-off ratio (>107) [1]. Asymmetric saturation-region current-voltage characteristics were also obtained when the transistor source and drain electrodes were interchanged. Using the Synopsys Sentaurus drift-diffusion simulator we developed a physics-based two-dimensional model for SALD ZnO VTFTs. Using the model, we are able to reproduce the electrical behavior of the ZnO VTFTs and understand the role of nanometer-scale features in the device structure.

ZnO thin film transistors for more than just displays

Active rectifiers combine a high-gain amplifier (used as a comparator) and actively controlled switches to provide reduced turn-on voltage compared to p-n and Schottky diodes. Most reports of active rectifiers use silicon MOS transistor technology, however for some applications it is useful to combine active rectifiers with micro-electromechanical systems (MEMS) or to provide active rectifiers distributed over a large area. For such applications active rectifiers using thin film transistors (TFTs) are of interest. In this paper, we demonstrate a low-power full-wave active rectifier fabricated using double-gate ZnO TFTs. The double-gate TFT structure allows tuning of the device turn-on voltage and threshold voltage by biasing the top gate [1]. This simplifies fabrication of enhancement/depletion mode circuits and allows high gain inverter stages that operate at low power.