J. Israel Ramirez

Radiation-Hard ZnO Thin Film Transistors

We report effects for up to 100 Mrad (SiO2) gamma-ray exposure on polycrystalline ZnO thin film transistors (TFTs) deposited by two different techniques. The radiation related TFT changes, either with or without electrical bias during irradiation, are primarily a negative VON shift and a smaller VT shift (ΔVON ~ - 2.5 V and ΔVT ~ - 1.5 V for 100 Mrad (SiO2) exposure). Field-effect mobility remains nearly unchanged. Both, VON and VT shifts are nearly completely removed by annealing at 200°C for 1 minute and some recovery is seen even at room temperature. We find that our ZnO TFTs are insensitive to electrical bias during irradiation; that is, unbiased measurements are useful worst case test results. To the best of our knowledge, these are the most radiation-hard thin film transistors reported to date.

Technology Requirements For a Square-Meter, Arcsecond-Resolution Telescope for X-Rays: The SMART-X Mission

Addressing the astrophysical problems of the 2020’s requires sub-arcsecond x-ray imaging with square meter effective area. Such requirements can be derived, for example, by considering deep x-ray surveys to find the young black holes in the early universe (large redshifts) which will grow into the first super-massive black holes. We have envisioned a mission, the Square Meter Arcsecond Resolution Telescope for X-rays (SMART-X), based on adjustable x-ray optics technology, incorporating mirrors with the required small ratio of mass to collecting area. We are pursuing technology which achieves sub-arcsecond resolution by on-orbit adjustment via thin film piezoelectric “cells” deposited directly on the non-reflecting sides of thin, slumped glass. While SMART-X will also incorporate state-of-the-art x-ray cameras, the remaining spacecraft systems have no requirements more stringent than those which are well understood and proven on the current Chandra X-ray Observatory.

Effects of gamma-ray irradiation and electrical stress on ZnO thin film transistors

Radiation tolerance is of interest in electronic applications such as radiation sensors, nuclear reactors, x-ray imagers, and high-energy particle accelerators. While properly designed Si MOSFETS are usefully radiation resistant, most thin-film transistors (TFTs), including polysilicon and a-Si:H, are severely degraded by relatively low irradiation dose (typically <;1 Mrad) [1, 2]. We previously reported gamma ray radiation exposure results for unbiased ZnO TFTs and circuits and found only small electrical changes for doses up to 100 Mrad [3]. For applications with TFTs operating in harsh radiation environments, the effects of simultaneous electrical stress and radiation exposure are important. We report here the effects of 60Co gamma irradiation and electrical stress on the characteristics of ZnO TFTs with active and dielectric layers deposited by weak-oxidant plasma enhanced atomic layer deposition (PEALD).

Effect of c-Si doping density on heterojunction with intrinsic thin layer (HIT) radial junction solar cells

Radial junction Si pillar array solar cells based on the heterojunction with intrinsic thin layer (HIT) structure were fabricated from p-type crystal Si (c-Si) wafers of different doping densities. The HIT structure consisting of intrinsic/n-type hydrogenated amorphous Si (a-Si:H) deposited by plasma-enhanced chemical vapor deposition (PECVD) at low temperature (200°C) was found to effectively passivate the high surface area of the p-type Si pillar arrays resulting in open circuit voltages (Voc>0.5) comparable to that obtained on planar devices. At high c-Si doping densities (>1018 cm-3), the short-circuit current density (Jsc) and energy conversion efficiency of the radial junction devices were higher than those of the planar devices demonstrating improved carrier collection in the radial junction structure.

Low-voltage ZnO double-gate thin film transistor circuits

We report here double-gate ZnO thin film transistor (TFT) circuits with operation at low voltage. TFTs with low voltage operation have been reported previously, but often use very thin (few nm thick) gate dielectric which may limit manufacturability. Oxide semiconductor-based TFTs have been extensively studied as competitive candidates for next-generation display technology and other large-area electronics. For many applications, operation at voltages compatible with low-voltage CMOS is important. Doublegate TFTs are of interest because they allow threshold voltage tuning, improved device performance, and circuit applications like mixers. We have previously reported bottom-gate ZnO TFTs and circuits fabricated on glass and flexible polymeric substrates using plasma enhanced atomic layer deposition (PEALD). Here we report double-gate ZnO TFTs and circuits fabricated on glass substrates using PEALD with a maximum process temperature of 200 °C. Compared to bottom-gate ZnO TFTs, doublegate ZnO TFTs have higher mobility, and reduced substhreshold slope. In these devices, the top gate can be used to vary the bottom-gate threshold voltage by more than 4 V. This allows the logic transition point for circuits to be adjusted as desired and allows logic operation at low voltage. 15 stage double-gate ZnO TFT ring oscillators operate well with VDD = 1.2 V, ID = 32 μA, and propagation delay of 2.1 μs/stage.

ZnO thin film transistors for more than just displays

We have fabricated ZnO thin film transistors (TFTs) on rigid and flexible substrates with characteristics well suited for displays and more general microelectronic applications. Using weak-reactant plasma enhanced atomic layer deposition (PEALD) we have fabricated single-gate, double-gate, and trilayer ZnO TFTs with good performance and stability. We have also fabricated TFTs and circuits on thin (few μm thick) solution-cast polymeric substrates that can be flexed to small radius for thousands of cycles.

Cost-Effective Integration of an a-Si:H Solar Cell and a ZnO TFT Ring Oscillator—Toward an Autonomously Powered Circuit

Cost-effective integration of a-Si:H solar cells and oxide-based thin-film transistor (TFT) circuits may lead to broader battery-free device applications. We demonstrate a n-i-p a-Si:H 15-series connected solar cell that supplies power to a ZnO-based ring oscillator. The ring oscillator can operate at 28 kHz at 6 V, corresponding to ≈100 mW/cm2 illumination. This letter describes the integration and compact fabrication of the a-Si:H solar cell and ZnO TFT ring oscillator. The fabrication process includes several mask steps to reduce the number of processing steps.

Low-temperature PEALD ZnO double-gate TFTs

We report double-gate ZnO thin film transistors fabricated using weak reactant plasma enhanced atomic layer deposition (PEALD) with a maximum process temperature of 200˚C. When operated as bottom gate only devices the TFTs have linear region mobility of 19 cm2/V⋅s and the top gate can be used to vary the bottom-gate TFT threshold voltage by more than 2 V. With top and bottom gates connected together the linear region mobility increases to 24 cm2/V⋅s, with a subthreshold slope of 160 mV/decade. The low process temperature of these devices allows simple fabrication on polyimide and other flexible polymeric substrates. Double gate TFTs are of interest to allow threshold voltage tuning, improved device performance and stability, and for circuit applications like mixers and analog circuits design. Double gate TFTs have been demonstrated using GIZO[1, 2]; however, these reports used a maximum process temperature of 350 °C, too high for flexible polymeric substrates. We have previously reported high quality ZnO TFTs fabricated on both glass and plastic substrates using weak reactant PEALD with a maximum process temperature of 200 °C[3, 4]. We now report double gate TFTs with the same maximum process temperature.

Piezoelectric MEMS Energy Harvesters

The development of self-powered wireless microelectromechanical (MEMS) sensors hinges on the ability to harvest adequate energy from the environment. When solar energy is not available, mechanical energy from ambient vibrations, which are typically low frequency, is of particular interest. Here, higher power levels were approached by better coupling mechanical energy into the harvester, using improved piezoelectric layers, and efficiently extracting energy through the use of low voltage rectifiers. Most of the available research on piezoelectric energy harvesters reports Pb(Zr,Ti)O3 (PZT) or AlN thin films on Si substrates, which are well-utilized for microfabrication. However, to be highly reliable under large vibrations and impacts, flexible passive layers such as metal foil with high fracture strength would be more desirable than brittle Si substrates for MEMS energy harvesting. In addition, metallic substrates readily enable tuning the resonant frequency down by adding proof masses. In order to extract the maximum power from such a device, a high level of (001) film orientation enables an increase in the energy harvesting figures of merit due to the coupling of strong piezoelectricity and low dielectric permittivity.Strongly {001} oriented PZT could be deposited by chemical solution deposition or RF magnetron sputtering and ex situ annealing on (100) oriented LaNiO3 / HfO2 / Ni foils. The comparatively high thermal expansion coefficient of the Ni facilitates development of a strong out-of-plane polarization. 31 mode cantilever beam energy harvesters were fabricated using strongly {001} textured 1∼3 μm thick PZT films on Ni foils with dielectric permittivity of ∼ 350 and low loss tangent (<2%) at 100 Hz. The resonance frequency of the cantilevers (50∼75 Hz) was tuned by changing the beam size and proof mass. A cantilever beam with 3 μm thickness of PZT film and 0.4 g proof mass exhibited a maximum output power of 64.5 μW under 1 g acceleration vibration with a 100 kΩ load resistance after poling at 50 V (EC ∼ 16 V) for 10 min at room temperature. Under 0.3g acceleration, the average power of the device is 9 μW at a resonance frequency of ∼70 Hz. Excellent agreement between the measured and modeled data was obtained using a linear analytical model for an energy harvesting system, using an Euler-Bernoulli beam model. It was also demonstrated that up to an order of magnitude more power could be harvested by more efficiently utilizing the available strain using a parabolic mode shape for the vibrating structure. Additionally, voltage rectifying electronics in the form of ZnO thin film transistors are deposited directly on the cantilever. This relieves the role of voltage rectification from the interfacing circuitry and provides a technique improved harvesting relative to solid state diode rectification because the turn-on bias can be reduced to zero.© 2014 ASME

Tri-layer PEALD ZnO thin film transistors and circuits

In oxide semiconductors, defect chemistry and hydrogen can influence free carrier concentration and these materials can have strong interactions with the atmosphere and contaminents.[1,2] An inverted staggered structure is commonly used for oxide TFTs and a high-quality passivation layer is needed to provide protection and minimize back channel surface charge changes.[2,3] Negative shifts in turn-on and threshold voltage after passivation with inorganic thin films have been reported by several groups.[4,5] We have previously reported weak oxidant plasma enhanced atomic layer deposition (PEALD) ZnO TFTs with an ALD-based Al2O3 passivation layer [6]. Before passivation the TFT has a turn-on voltage near 0 V, but significant hysteresis (often > 0.5 V). A 32 nm thick Al2O3 layer deposited by ALD eliminates the hysteresis, but causes a negative shift in turn-on and threshold voltage (~3 V). A 32 nm thick Al2O3 layer deposited by PEALD also removes the hysteresis, but shifts the device turn-on and threshold voltage negative by more than 10 V [6]. We have developed a tri-layer process for bottom-gate, top contact TFTs. An Al2O3-ZnO-Al2O3 tri-layer is deposited sequentially at 200°C and provides effective passivation and reduced turn-on voltage shift.