Karine Isoird
Hoffmann-La Roche
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Publication
Featured researches published by Karine Isoird.
international symposium on power semiconductor devices and ic's | 2009
L. Theolier; H. Mahfoz-Kotb; Karine Isoird; F. Morancho
Numerous techniques have been used to improve the voltage handling capability of high voltage power devices with the aim to obtain the breakdown of a plane junction. In this work, a new concept of low cost, low surface and high efficiency junction termination for power devices is presented and experimentally validated. This termination is based on a large and deep trench filled by BCB (BenzoCycloButene) associated to a field plate. Simulation results show the important impact of trench design and field plate width on termination performances. The experimental breakdown voltage of this Deep Trench Termination (DT2) is close to 1300 Volts: this value validates not only the concept of the DT2 but also the choice of the BCB as a good dielectric material for this termination.
Microelectronics Reliability | 2014
Tanguy Phulpin; David Trémouilles; Karine Isoird; Dominique Tournier; Philippe Godignon; Patrick Austin
Efficient energy management become more and more crucial with increasing energy resource scarcity. Power electronic will play a major role in this field and thus require innovations like using wide band gap semiconductor to build power devices. SiC, GaN, diamond material-based devices are currently more or less mature and will sooner or later require investigations on their reliability to allow their wide adoption. In this work we investigate on the robustness of a SiC-MESFET to ElectroStatic-Discharge (ESD). Surprisingly the ESD robustness is rather low and found to be related to both current non-uniformity and a quite unexpected parasitic NPN bipolar transistor triggering. The outcome of this study allows proposing first guidelines to optimize ESD robustness of such devices.
international conference on microelectronics | 2013
Houssam Arbess; Karine Isoird
New field plate architecture is applied to pseudo vertical diamond Schottky diode. New topology structure has been proposed and simulated using Sentaurus TCAD simulation in order to minimize the maximum electric field in the dielectric at high voltage operation. Firstly and after simple variations in the field plate architecture, the breakdown voltage was improved from 1632 V to 2141 V at 700 K. Concerning Emax in the dielectric, we obtained high decreasing of the maximum electric field following the policy of pressure distribution.
european conference on power electronics and applications | 2016
E. Marcault; D. Tremouilles; Karine Isoird; F. Morancho; Mathieu Gavelle
Power GaN HEMT components offer very interesting performances (high voltage, high current, low on-resistance, fast switching), but the GaN material has some “defects” that can lead to carrier trapping, which induces dynamic electrical phenomena. Thereby, static measurement of the GaN HEMT components requires some reconsideration. In this work, we analyze how the typical static electrical parameters evolve as a function of time and how much they deviate from the DC measurements.
electrical overstress electrostatic discharge symposium | 2015
Tanguy Phulpin; David Trémouilles; Karine Isoird; Dominique Tournier; Philippe Godignon; Patrick Austin
Among wide band gap material for power electronic, Silicon Carbide (SiC) is the most advanced and starts to gain market shares. We have studied planar SiC MESFET ESD robustness. To solve the problem of their low intrinsic ESD robustness, we demonstrate in this work an effective protection solution and possible improvements.
Microelectronics Reliability | 2015
Tanguy Phulpin; David Trémouilles; Karine Isoird; Dominique Tournier; Philippe Godignon; Patrick Austin
Abstract Reliability studies are required for SiC device development. In a previous work we studied the intrinsic ESD robustness of a SiC MESFET. The failure mechanism was related to the triggering of an NPN parasitic transistor. In this work, a new MESFET layout is considered, which optionally include a Zener diode for internal protection. TLP testing and failure analysis has been carried out. Two new failure mechanisms are evidenced. Based on this knowledge, solutions are proposed to further improve the ESD robustness.
european conference on power electronics and applications | 2013
Houssam Arbess; Karine Isoird; Saleem Hamady
New field plate architecture is applied to pseudo vertical diamond Schottky diode. Using several field plate architectures, a TCAD simulation is realized in order to reduce the electric field in the dielectric while maintaining high breakdown voltage. Firstly and after simple variations in the field plate architecture, the breakdown voltage was improved from 1632 V to 2141 V at 700 K. Concerning Emax in the dielectric, we obtained a decreasing of maximum electric field from 57 to 18 MV/cm.
Epe Journal | 2017
Richard Monflier; Karine Isoird; Alain Cazarré; Josiane Tasselli; Alexandra Servel; J. Achard; David Eon; Maria José Valdivia Birnbaum
Abstract In this paper, we present current-voltage characteristics of vertical and pseudo-vertical Diamond Schottky diodes operating up to 473 K. The functionality rate is greater than 75% for each samples. For vertical diodes, current density at 473 K reaches 488 A/cm², while it is greater than 1000 A/cm² for pseudo-vertical diodes. Under reverse bias, the leakage current is less than 10−7 A/cm² at 50 V for all functional diodes. However, the high barrier height and high non-ideality factor observed are probably caused by high charges at the Diamond/Schottky contact interface. This article emphasizes the high reproducibility of the characteristics and the functionality rate at 473 K.
Diamond and Related Materials | 2012
Sodjan Koné; Henri Schneider; Karine Isoird; Fabien Thion; J. Achard; R. Issaoui; Sabeur Msolli; Joël Alexis
Diamond and Related Materials | 2010
Sodjan Koné; G. Civrac; Henri Schneider; Karine Isoird; R. Issaoui; J. Achard; A. Gicquel