Kazunori Kawamoto

A no-snapback LDMOSFET with automotive ESD endurance

This paper presents a no-snapback lateral double-diffused MOSFET (LDMOSFET), which endures the electrostatic discharge (ESD) requirement for automotive applications under the condition of 15 kV, 150 pF, and 150 /spl Omega/, representing one order of magnitude higher ESD voltage than conventional LDMOS. First, the mixed (circuit and device) mode simulations analyze the typical ESD failure dynamics of the conventional LDMOSFET, correlating the circuit level transient responses and the device level snapback characteristics (i.e., the negative breakdown voltage-current (V-I) characteristics). Then, the mechanism of the snapback is clarified from the aspect of the feedback link between the turn-on of the parasitic bipolar junction transistor (BJT) and the breakdown of the drain n-n/sup +/ diode. Finally, a no-snapback LDMOSFET is experimentally demonstrated that attains the objective ESD endurance.

Evaluation of the initial oxidation of heavily phosphorus doped silicon surfaces using angle-dependent X-ray photoelectron spectroscopy

Abstract The room temperature oxidation of heavily P-doped Si(100) and poly-Si prepared by HF-treatment has been monitored for a period of about 1 year, using angle-dependent X-ray photoelectron spectroscopy (XPS) and atomic force microscope (AFM), Immediately after HF-treatment, the P/Si atomic ratio increased with decreasing the photoelectron take-off angle, which implies that the more segregated-P existed in near the top surface region. The amount of activated Si, whose binding energy of Si2p was lower by 0.5 eV referred to that of lattice Si related to the amount of segregated-P closely. In the case of the P-doped samples, the chemical composition of the growing oxide films showed that not the Si ++ but the Si 3+ state was the dominant component until the oxide thickness, d , went up to over ~1.5 nm, while the Si 4+ was the major species for the moderately doped Si(100) and nondoped poly-Si, except in the very initial oxide ( d ). In contrast to the smooth AFM image of the moderately doped Si(100) surface, the heavily P-doped Si(100) showed very unique geometrical pattern.

An advanced no-snapback LDMOSFET with optimized breakdown characteristics of drain n-n/sup +/ diodes

Snapbacks in sustain characteristics of lateral double-diffused MOSFETs (LDMOSFETs) are caused by positive feedbacks between the turn-on of the bipolar junction transistors (BJTs) and the avalanche breakdown of the drain n-n/sup +/ diodes . Although the n-n/sup +/ diodes are thus one of the most basic parasitic devices, which play a leading role in the snapback characteristics, neither a textbook nor a paper has ever described their breakdown characteristics in depth so as to realize a simple no-snapback LDMOSFET. This paper analyzes the snapback characteristics of n-n/sup +/ diodes and their mechanisms in detail. The no-snapback theory derived from this study is applied to an advanced no-snapback LDMOSFET with a simple structure, as an improved version of the conventional no-snapback LDMOSFET , which endures the electrostatic discharge (ESD) criterion for automotive applications: 15 kV, 150 pF, and 150 /spl Omega/.

Annealing behavior of phosphorus in native oxide films on heavily phosphorus doped silicon

Abstract Phosphorus redistribution and its chemical structure in the native oxide/Si as well as thermal oxides (∼ 30 nm)/Si were investigated using X-ray photoelectron spectroscopy (XPS) and secondary ion mass spectroscopy (SIMS). The Si substrates were both heavily P-doped Si(100) and poly-Si, together with nondoped poly-Si. The in-depth profiles of P obtained by both XPS and SIMS showed that the dopant-P redistributed in the thin native oxide film (NOF) even at room temperature, and the amount of P increased drastically upon annealing. The amount of redistributed P was much larger for Si(100) than for poly-Si. The dominant chemical structure of P was not P2O5 but elemental-P and/or Si-P. Clear pileup of P at theNOF/Si interface could not be observed, since the thickness of NOF is very thin and probably P diffused into throughout the NOF. In the case of thermal oxides, both SIMS and XPS profiles exhibited a big pileup-P at the oxide/Si interface. The amount of pileup-P was about two times larger for the Si(100) than for the poly-Si, and it increased with annealing temperature. In the oxide films, the31P in SIMS as well as P0 and P2O5 features in XPS were also detected, although the intensities were very weak compared to those at the interface.

Phosphorus redistribution in the surface region of heavily phosphorus doped silicon

Abstract Heavily phosphorus doped samples of both Si(100) and polycrystalline silicon (poly-Si) together with nondoped poly-Si were examined using X-ray photoelectron spectroscopy (XPS) and secondary ion mass spectroscopy (SIMS). The surfaces were treated by HF or a mixed solution of HCl, H 2 O 2 and H 2 O. The Si2p photoelectron spectra from the heavily P-doped samples showed a new peak at below 0.4 eV from the Si 0 state, which suggests that the Si-P bond and/or activated Si atoms with dangling bond exist in the surface region of as large as several nanometers. This is further supported by the analysis of P2p spectra. A lots of P atoms diffused to the surface and broke the Si-Si bond, which caused the surfaces chemically unstable. Consequently, although the H-terminated nondoped poly-Si surface showed no oxide features, the heavily P-doped samples of both Si(100) and poly-Si exhibited 0.5–1 nm thick oxides. The sputter profiles of XPS and SIMS revealed that P atoms redistributed in the thin native oxide film and formed not P 2 O 5 but Si-P and/or elemental-P, even without intentional heating. The P-segregation was much more pronounced for the single crystal Si than for the poly-Si.

Analysis of SiO2/Si(001) interface roughness for thin gate oxides by scanning tunneling microscopy

We studied the interface roughnesses of SiO2/Si(001) for gate oxides of 8 and 15 nm thicknesses together with RCA-treated samples by using scanning tunneling microscopy (STM). By STM observation and scaling analysis we made clear that the interface roughnesses of thermal oxides/Si substrates were similar to each other and to that of the chemical oxide/Si substrate prior to thermal oxidation; the correlation length was 23–26 nm and the rms roughness at length scales larger than the correlation length was 0.28–0.29 nm. The results indicate that the interface roughnesses of the oxides are determined by the processes prior to the oxidations.

A Single Chip Automotive Control LSI Using SOI Bipolar Complimentary MOS Double-Diffused MOS

Using the example of an air bag controller, a single chip solution for automotive sub-control systems is investigated, by using a technological combination of improved circuits, bipolar complimentary metal oxide silicon double-diffused metal oxide silicon (BiCDMOS) and thick silicon on insulator (SOI). For circuits, an automotive specific reduced instruction set computer (RISC) center processing unit (CPU), and a novel, all integrated system clock generator, dividing digital phase-locked loop (DDPLL) are proposed. For the device technologies, the authors use SOI-BiCDMOS with trench dielectric-isolation (TD) which enables integration of various devices in an integrated circuit (IC) while avoiding parasitic miss operations by ideal isolation. The structures of the SOI layer and TD, are optimized for obtaining desired device characteristics and high electromagnetic interference (EMI) immunity. While performing all the air bag system functions over a wide range of supply voltage, and ambient temperature, the resulting single chip reduces the electronic parts to about a half of those in the conventional air bags. The combination of single chip oriented circuits and thick SOI-BiCDMOS technologies offered in this work is valuable for size reduction and improved reliability of automotive electronic control units (ECUs).

Investigation of Reoxidation and Phosphorus Behavior in HF-Treated Heavily Doped Silicon Surfaces

The thermally stimulated desorption (TSD) from aqueous HF-treated heavily phosphorus-doped Si(100) and polycrystalline Si surfaces was studied by Auger electron spectroscopy (AES), electron energy loss spectroscopy (EELS) and mass spectroscopy. Desorption analyses indicated that reoxidation takes place slightly, to the same extent in the doped Si(100) and polycrystalline Si surfaces owing to hydrogen desorption. Moreover, a large quantity of phosphorus segregates to the top few layers in the desorption process of the oxides. It was clarified that the HF-treated polycrystalline silicon surface is terminated by hydrogen and resists oxidation similarly to a single-crystal one.

Gate insulator characteristics on the bonded thick SOI wafers for automotive IC applications

For the robustness of harsh environments around automotive ICs, such as negative surge and ESD, the authors have committed the thick SOI BiCDMOS process with trench dielectric isolations. This paper focuses on causes degrading reliability of gate insulators such as silicon dioxides and ONO (Oxide Nitride Oxide) films induced by the process.