Isao Shirakawa

A New Algorithm for Generating All the Maximal Independent Sets

The problem of generating all the maximal independent sets (or maximal cliques) of a given graph is fundamental in graph theory and is also one of the most important in terms of the application of graph theory. In this paper, we present a new efficient algorithm for generating all the maximal independent sets, for which processing time and memory space are bounded by

An object code compression approach to embedded processors

O(nm\mu)

The multilayer routing problem: Algorithms and necessary and sufficient conditions for the single-row, single-layer case

and

Links-1 - a parallel pipelined multimicrocomputer system for image creation

O(n+m)

VLSI implementation of inverse discrete cosine transformer and motion compensator for MPEG2 HDTV video decoding

, respectively, where n, m, and

An algorithm for single-row routing with prescribed street congestions

\mu

Spatiotemporal segmentation for compact video representation

are the numbers of vertices, edges, and maximal independent sets of a graph.

FeRAM circuit technology for system on a chip

A low-power processor architecture is described dedicatedly for embedded application programs by means of an object code compression approach. This approach unifies duplicated instructions existing in the embedded program and assigns a compressed object code to such an instruction. An instruction decompressor is constructed so as to generate an object code from each compressed object code (pseudo code) input. A single-chip implementation of this decompressor together with a processor core can effectively reduce the bandwidth required for the I/O interface. To demonstrate the practicability of the proposed approach, experiments are applied to an embedded processor ARM610 which attains 62.5% code compression, and hence 42.3% of the power consumption of instruction memory can be reduced.

High-speed implementation of JBIG arithmetic coder

The multilayer routing problem is introduced and its relation to the single-row single-layer routing problem is illustrated [1], [2]. An easily implementable sufficient condition on the routability of a net list over a single row of nodes is presented. The solution is given by a constructive forward marching procedure and the result is an improvement over the worst-case prediction of So [1]. The implementation algorithm is programmed on CDC 6400 computer. The nature of the optimum criterion relating to single-row routability is investigated and a necessary and sufficient condition is given to characterize the nature of optimality. Some necessary conditions are also presented which can be used to evaluate the sufficient condition and served as a lower bound for the channel capacity in the routing problem. The more general routing problem is illustrated and possible future research directions are discussed.

A no-snapback LDMOSFET with automotive ESD endurance

A multimicrocomputer system is described, stressing mainly software and hardware architectures, which has been constructed mainly for image creation. This system is distinctive mainly in that (i) 64 unit computers are interconnected with a root computer, each of equal performance, such that a number of unit computers constitute a pipelined computer and such pipelined computers work in parallel, all controlled by the root computer, and (ii) an intercomputer memory swapping unit is introduced, which is to be linked with a pair of unit computers to transfer a great amount of data at a time from one to the other through the use of a bus exchange switch.