Kentaro Kinoshita

Reduction in the reset current in a resistive random access memory consisting of NiOx brought about by reducing a parasitic capacitance

The dependence of the relationship between the reset current Ireset and the compliance current Icomp (Ireset-Icomp characteristic) of a Pt∕NiOx∕Pt structure on the parasitic capacitance between the Pt∕NiOx∕Pt structure and a current limiter C was measured for Icomp<1mA. It was clarified that C deviated the Ireset-Icomp characteristic from the ideal linear relationship expected for C=0 and Ireset saturated at higher Icomp for larger C. This is attributed to a transient current flowing through C when the forming or set transitions occurred. The relationship of Ireset≈Icomp was maintained down to Icomp=150μA in the 1T1R cell with very small C.

Bias polarity dependent data retention of resistive random access memory consisting of binary transition metal oxide

The authors investigated the data retention properties of NiOy resistors exposed to sputtered particles and found that they depended on the bias polarity used to program the data. Only the data in the high resistance state programmed by applying positive bias to the top electrode were easily damaged. This suggests that the “reset” process can take place when the anodic side of the conductive filaments, which were formed during the “forming” process, is insulated. In addition, the data retention test for thermal stress suggests that the reset process can take place thermally.

Direct observation of oxygen movement during resistance switching in NiO/Pt film

We demonstrate that both a low resistance state and a high resistance state can be written by bipolar voltage application in a local region of NiO/Pt films by using conducting atomic force microscopy. To investigate how oxygen played a role in the resistance switching phenomenon, a local writing process in O18 tracer gas atmosphere was carried out and the composition change was examined by time-of-flight secondary ion mass spectroscopy. As a result, it was revealed that oxygen moves to the anode side, and the composition of the NiO surface might change thereby causing the change in resistance.

Consideration of switching mechanism of binary metal oxide resistive junctions using a thermal reaction model

The authors investigated the resistive switching of transition metal oxide (TMO) junctions by applying a short voltage pulse and found that the response time of the “reset” process was dependent on the resistance in the low resistive state. By using a thermal conductive equation to calculate the temperature of the filamentary conductive path in the TMO film, the temperature in the reset process was estimated to reach the same temperature grade in each reset. On this basis, the previous experimental relation is well explained by assuming a general thermal chemical reaction model for the reset process.

Sub-

Resistive random access memory consisting of NiO resistive memories and control transistors was fabricated with 0.18-mum CMOS technology. An initial forming voltage as low as 2 V was achieved with thin NiO film, and a reset current lower than 100 muA was realized by using the current limit of a selected cell transistor in the set process (1T-1R). The current level was determined by its gate voltage, resulting in the control of electrical resistance of the filamentary conductive paths in the low resistive state. Furthermore, a large voltage increase in the reset operation, which may cause an undesirable set operation, was also suppressed by a voltage-clamp transistor connected to the 1T-1R cell in series. On the basis of these proposed switching schemes, the stable pulse operation was demonstrated successfully. In addition, both nonvolatile data retention at 150degC and operation in a wide temperature range (from -40degC to 150degC) were confirmed.

\hbox{100-}\mu\hbox{A}

In this paper, we fabricated 1T1R NiO-ReRAM test circuits based on 0.18 mum CMOS technology and observed notable suppression of I_reset by imposing current compliance I_comp using a cell transistor. Reducing the stray capacitance between Pt/NiO/Pt and the cell transistor used as a current limiter is crucial in this issue. This enabled the systematic measurement of I_comp dependence of l_reset for I_comp < 1 mA and I_reset ap I_comp was observed for 150 muA les I_comp les950 muA.

Reset Current of Nickel Oxide Resistive Memory Through Control of Filamentary Conductance by Current Limit of MOSFET

We propose a parallel resistance model (PRM) in which total resistance (Rtotal) is given by the parallel connection of resistance of a filament (Rfila) and that of a film excluding the filament (Rexcl)—that is, 1/Rtotal 1/Rfila + 1/Rexcl—to understand direct current (dc) electric properties of resistive random-access memory (ReRAM). To prove the validity of this model, the dependence of the resistance on temperature, R(T), and the relative standard deviation (RSD) of RHRS of Pt/NiO/Pt on the area of a top electrode, S, are investigated. It is clarified that both the R(T) and RSD depended on S, and all such dependencies can be explained by the PRM. The fact that Rtotal is decided by the magnitude relation between Rfila and Rexcl makes transport properties S-dependent and hinders the correct understanding of ReRAM. Smaller S is essential to observe the intrinsic transport properties of ReRAM filaments.