Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Ki-won Lim is active.

Publication


Featured researches published by Ki-won Lim.


international solid-state circuits conference | 2007

A 90nm 1.8V 512Mb Diode-Switch PRAM with 266MB/s Read Throughput

Kwang-Jin Lee; Beak-Hyung Cho; Woo-Yeong Cho; Sang-beom Kang; Byung-Gil Choi; Hyung-Rok Oh; Chang-Soo Lee; Hye-jin Kim; Joon-Min Park; Qi Wang; Mu-Hui Park; Yu-Hwan Ro; Joon-Yong Choi; Ki-Sung Kim; Young-Ran Kim; In-Cheol Shin; Ki-won Lim; Ho-keun Cho; Chang-han Choi; Won-ryul Chung; Du-Eung Kim; Kwang-Suk Yu; G.T. Jeong; Hong-Sik Jeong; Choong-keun Kwak; Chang-Hyun Kim; Kinam Kim

A 512Mb diode-switch PRAM is developed in a 90nm CMOS technology. A core configuration, read/write circuit techniques, and a charge-pump system for the diode-switch PRAM are described. Through these schemes, the PRAM achieves read throughput of 266MB/S and maximum write throughput of 4.64MB/S with a 1.8V supply.


international solid-state circuits conference | 2011

A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW

Hoe-ju Chung; Byung Hoon Jeong; Byung-Jun Min; Young-don Choi; Beak-Hyung Cho; J.M. Shin; Jin-Young Kim; Jung Sunwoo; Joon-Min Park; Qi Wang; Yong-Jun Lee; Sooho Cha; Duk-Min Kwon; Sang-Tae Kim; Sung-Hoon Kim; Yoohwan Rho; Mu-Hui Park; Jaewhan Kim; Ickhyun Song; Sunghyun Jun; Jae-Wook Lee; KiSeung Kim; Ki-won Lim; Won-ryul Chung; Chang-han Choi; HoGeun Cho; Inchul Shin; Woochul Jun; Seok-won Hwang; Ki-whan Song

In mobile systems, the demand for the energy saving continues to require a low power memory sub-system. During the last decade, the floating-gate flash memory has been an indispensable low power memory solution. However, NOR flash memory has begun to show difficulties in scaling due to the devices reliability and yield issues. Over the past few years, phase-change random access memory (PRAM) has emerged as an alternative non-volatile memory (NVM) owing to its promising scalability and low cost process [1,2]. In this paper, a PRAM, implemented in a 58nm PRAM process with a low power double-data-rate nonvolatile memory (LPDDR2-N) interface, is presented [3].


Archive | 2009

Nonvolatile Memory Devices Having Variable-Resistance Memory Cells and Methods of Programming the Same

Won-ryul Chung; Byung-Gil Choi; In-Cheol Shin; Ki-won Lim


Archive | 2007

PRAM and method of firing memory cells

Hye-jin Kim; Kwang-Jin Lee; Du-Eung Kim; Woo-Yeong Cho; Chang-han Choi; Ki-won Lim


Archive | 2008

Nonvolatile memory devices that include a write circuit that writes data over multiple write periods using pulses whose peaks do not coincide with each other

Young-Ran Kim; Ki-won Lim; Byung-Gil Choi; Ki-Sung Kim


Archive | 1999

Integrated circuit devices using fuse elements to generate an output signal that is independent of cut fuse remnants

Ki-won Lim; Eui-gyu Han; Jeong-Un Choi


Archive | 2007

Phase-change memory device and firing method for the same

Ki-won Lim; Won-ryul Chung; Young-Ran Kim


Archive | 1996

Semiconductor memory device having an interconnect structure which improves yield

Eui-Gyn Han; Kwang-suk Ryu; Ki-won Lim


Archive | 2014

NONVOLATILE MEMORY DEVICE AND METHOD FOR TESTING NONVOLATILE MEMORY DEVICE USING VARIABLE RESISTANCE MATERIAL

Moon-Ki Jung; Ki-won Lim


Archive | 2011

28.7 A 58nm 1.8V 1Gb PRAM with 6.4MB/s Program BW

Hoe-ju Chung; Byung Hoon Jeong; Byung-Jun Min; Young-don Choi; Beak-Hyung Cho; Jun-Ho Shin; Jin-Young Kim; Jung Sunwoo; Joon-Min Park; Qi Wang; Yong-Jun Lee; Sooho Cha; Duk-Min Kwon; Sang-Tae Kim; Sunghoon Kim; Yoohwan Rho; Mu-Hui Park; Jaewhan Kim; Ickhyun Song; Sunghyun Jun; Jae Wook Lee; KiSeung Kim; Ki-won Lim; Won-ryul Chung; Chang-han Choi; HoGeun Cho; Inchul Shin; Woochul Jun; Seok-won Hwang; Ki-Whan Song

Collaboration


Dive into the Ki-won Lim's collaboration.

Researchain Logo
Decentralizing Knowledge