Kohji Senda

Analysis of solid phase crystallization in amorphized polycrystalline Si films on quartz substrates

The solid phase crystallization of amorphized Si films on quartz substances is studied by means of the transmission electron microscope observation of grain growth. The amorphous Si films are prepared by Si ion implantation into polycrystalline Si films deposited by low‐pressure chemical vapor deposition. It has been found that the twin formation in grains at the early stage of the crystallization accelerates the growth rate preferentially in a 〈112〉 direction. During the twin growth about a given 〈112〉 direction, other twins also grow from the twin boundary dendritically in some other 〈112〉 directions, leading to the formation of a large grain of dendritic structure.

A laser-recrystallization technique for silicon-TFT integrated circuits on quartz substrates and its application to small-size monolithic active-matrix LCD's

The laser-recrystallization technique utilizes the connected-island structure for forming recrystallized silicon films with enlarged grain size controlled by the thermal gradient. This technique has been used to fabricate the driver circuits of small-size monolithic active-matrix liquid-crystal displays. A horizontal driver circuit with partially recrystallized silicon thin-film transistors (TFTs) has been successfully fabricated on quartz substrates, together with a vertical driver and active-matrix TFT circuits. The operating frequency of the fabricated horizontal driver circuits can be as high as 10 MHz under a clock voltage of 5 V. >

A high-voltage polysilicon TFT with multigate structures

An approach is proposed for obtaining a high-voltage thin-film transistor (TFT) with multigate structure where polysilicon TFTs are connected in series. A basic principle for high-voltage operation has been investigated in detail through calculations based on a model describing log I/sub DS/-V/sub GS/ characteristics observed in a single-gate polysilicon TFT. It has been found that off-state (V/sub GS/ >

Solid phase growth technique for high cut-off frequency polysilicon TFT integrated circuits on a quartz substrate

The technique features the use of self-implantation at two energy steps, i.e. 150 and 40 keV. The complete amorphization of the initial low-pressure chemical vapor deposition (LPCVD) polysilicon is thereby attained throughout the film. Application of the solid-phase growth technique resulted in excellent high-frequency performance of the thin-film transistors (TFTs) over a large area with high reproducibility. The field effect mobilities obtained for n-channel and p-channel TFTs are as high as 148 and 68 cm/sup 2//V-s, respectively. TFT shift registers consisting of 223 stages of CMOS D-type flip-flops can successfully operate at clock frequencies up to 25 MHz under a supply voltage of 15.5 V on a fused-quartz substrate. >

A stacked-CMOS cell technology for high-density SRAM's

A stacked-CMOS SRAM cell technology for high-density SRAMs has been developed. It has been found that the increase of the on-current of the thin-film transistor (TFT) load leads not only to the increase of the cell noise margin, but also to the reduction of the cell area. The improvement of the electrical characteristics of the TFT load has been achieved by enlarging the grains of the polysilicon film through the use of a novel solid-phase growth technique. As a result, TFT loads with on/off current ratio of 10/sup 5/ and off-current of 0.07 pA/ mu m, both promising for high-density SRAMs, have been obtained. >

A CPD image sensor with an SOI structure

A CPD image sensor with an SOI (silicon-on-insulator) structure has been developed. The sensor is composed of read-out transistors fabricated on laser-recrystallized silicon, photodiodes on the seeding region, an MOS shift register, and a CCD shift register. A reproduced image with a 50 (H)*60 (V) pixel image sensor showed reduction of smear noise to a value 1/8000 times that in the bulk transistor as a result of complete isolation of the drains of the read-out transistors by oxide layers. >

Dependence of growth length of single silicon crystals on scanning direction of laser beam in lateral seeding process

The growth length of single silicon crystals obtained by laser annealing was investigated in detail as a function of the scanning direction of the laser beam in the lateral seeding process on (100), (110), and (111) silicon substrates. It was found that the scanning direction 〈110〉 on a (100) substrate offers the largest growth length. An attempt has been made to interpret this result on the basis of a {111} facet formation model.

Lateral Seeding of Silicon-On-Insulator by Using an Elliptically-Shaped Laser Beam

It has been demonstrated that an elliptically-shaped laser beam with an elliptical ratio of 20 can be successfully used to obtain a melt width as large as 160 µm. We also discuss an interesting experimental result in which the growth length of a single crystal from the seeding region on (100) Si substrates is larger in the scanning direction along than along in a lateral seeding process.

Development of a new design simulator for poly-Si TFTs to optimize the lightly doped drain structure

A new design simulator to simulate the characteristics of poly-Si TFTs taking into account its physical structure was developed. By using the simulator, we can optimize the length and the sheet resistance of the LDD region in order to obtain sufficient ON currents and to suppress OFF currents under both dark and illuminated conditions.