Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by Kulwant M. Pandey.
Ibm Journal of Research and Development | 2009
Edward W. Chencinski; Mark A. Check; Casimer M. DeCusatis; H. Deng; M. Grassi; Thomas A. Gregg; Markus M. Helms; A. D. Koenig; L. Mohr; Kulwant M. Pandey; Thomas Schlipf; Torsten Schober; H. Ulrich; Craig R. Walters
The performance, reliability, and functionality of a large server are greatly influenced by the design characteristics of its I/O subsystem. The critical components of the IBM System z10™ I/O subsystem have, therefore, been significantly improved in terms of performance, capability, and cost. The first-order network has been redesigned from the long-evolved enhanced self-timed interface (eSTI) links to utilize InfiniBand™ links. A redesign of the host logic of I/O chips and the fiberoptic interfaces within the links made it possible to introduce InfiniBand-based IBM Parallel Sysplex® links. A broad range of legacy I/O channels have been carried forward to connect through InfiniBand, and a foundation has been laid for new channel types of improved functionality and performance. The first such hardware channel to be introduced is the next generation of Ethernet-virtualization data routers. A new and methodical recovery structure has been designed to ensure consistent, extensive support of reliability, availability, and serviceability. A building-block-oriented design process has been developed to enable the innovations that made these advances possible. Finally, a new performance verification methodology has been introduced to ensure that the system and subsystem designs are balanced to make effective use of the increased capacity.
Ibm Journal of Research and Development | 1999
Thomas A. Gregg; Kulwant M. Pandey; Richard K. Errickson
IBM has developed a new S/390® Parallel Sysplex® coupling interface for the G5 server called the Integrated Cluster Bus (ICB). This interface improves the coupling efficiency by greatly reducing message-passing latency. Using the transport layer of the S/390 self-timed interface (STI) introduced in the G3 server, ICB adds channel function to the hub chip to allow a more direct interconnection between S/390 servers. This new channel has the same function as the present intersystem channel (ISC), but because it is integrated into the hub chip and therefore requires no additional components, its reliability is much better than that of the ISC. Since the ISC transmits data at a peak rate of 106 MB/s over distances exceeding ten kilometers and the ICB transmits data at a peak rate of 333 MB/s at distances of ten meters, the ISC is still required for the more geographically dispersed Parallel Sysplexes, whereas the ICB is well suited to the machine room, where multiple servers can be interconnected by ten-meter cables. This paper describes the design approach for the ICB. It describes the fundamental message-passing requirements of the Parallel Sysplex and how they are implemented in very complex yet compact hardware in the servers hub chip.
Ibm Journal of Research and Development | 2012
Rainer Dorsch; Richard K. Errickson; Markus M. Helms; G. Crew; Thomas A. Gregg; Welela Haileselassie; Leornard W. Helmer; Andreas Kohler; Kulwant M. Pandey; Susanne Roscher; E. S. Rotter; Christian Haubelt
The coupling adapter hub of an IBM System z® server is a key component for the IBM System z Parallel Sysplex®. The hub is built to exchange messages between systems in a highly efficient manner. This paper describes the latest generation of high-fanout and low-latency coupling adapter cards, the associated firmware, and a new protocol. As in the z10® system, there is a long-range and a short-distance card. The coupling adapter for zEnterprise® 196 (z196) is based on the z10 infrastructure (InfiniBand® link layer), with the internal transport engine for message handling completely redesigned to support the new protocol and improve connectivity, latency, and throughput. In addition to enabling the new adapters functionality, the Parallel Sysplex support firmware has several significant enhancements in a number of functional areas. Connectivity and utilization are improved through the ability to define more channels and more concurrent connections (message buffer sets) for each channel. Through a combination of hardware and firmware protocols, response time for messages at a short distance is significantly improved. Finally, new methods are presented that support efficient presilicon and postsilicon functional and performance verification.
Archive | 1997
Thomas A. Gregg; Kulwant M. Pandey
Archive | 2001
Thomas A. Gregg; Kulwant M. Pandey
Archive | 1993
Thomas A. Gregg; Joseph M. Hoke; Kulwant M. Pandey
Archive | 1997
Thomas A. Gregg; Kulwant M. Pandey
Archive | 1995
Thomas A. Gregg; Joseph M. Hoke; Kulwant M. Pandey
Archive | 2004
Thomas A. Gregg; Stephen R. Burrow; Kulwant M. Pandey; Patrick J. Sugrue
Archive | 2001
Thomas A. Gregg; Stephen R. Burrow; Kulwant M. Pandey; Patrick J. Sugrue