L. Lodola

The PixFEL project: development of advanced X-ray pixel detectors for application at future FEL facilities

The PixFEL project aims to develop an advanced X-ray camera for imaging suited for the demanding requirements of next generation free electron laser (FEL) facilities. New technologies can be deployed to boost the performance of imaging detectors as well as future pixel devices for tracking. In the first phase of the PixFEL project, approved by the INFN, the focus will be on the development of the microelectronic building blocks, carried out with a 65 nm CMOS technology, implementing a low noise analog front-end channel with high dynamic range and compression features, a low power ADC and high density memory. At the same time PixFEL will investigate and implement some of the enabling technologies to assembly a seamless large area X-ray camera composed by a matrix of multilayer four-side buttable tiles. A pixel matrix with active edge will be developed to minimize the dead area of the sensor layer. Vertical interconnection of two CMOS tiers will be explored to build a four-side buttable readout chip with small pixel pitch and all the on-board required functionalities. The ambitious target requirements of the new pixel device are: single photon resolution, 1 to 104 photons @ 1 keV to 10 keV input dynamic range, 10-bit analog to digital conversion up to 5 MHz, 1 kevent in-pixel memory and 100 μm pixel pitch. The long term goal of PixFEL will be the development of a versatile X-ray camera to be operated either in burst mode (European XFEL), or in continuous mode to cope with the high frame rates foreseen for the upgrade phase of the LCLS-II at SLAC.

Novel active signal compression in low-noise analog readout at future X-ray FEL facilities

This work presents the design of a low-noise front-end implementing a novel active signal compression technique. This feature can be exploited in the design of analog readout channels for application to the next generation free electron laser (FEL) experiments. The readout architecture includes the low-noise charge sensitive amplifier (CSA) with dynamic signal compression, a time variant shaper used to process the signal at the preamplifier output and a 10-bit successive approximation register (SAR) analog-to-digital converter (ADC). The channel will be operated in such a way to cope with the high frame rate (exceeding 1 MHz) foreseen for future XFEL machines. The choice of a 65 nm CMOS technology has been made in order to include all the building blocks in the target pixel pitch of 100 μm. This work has been carried out in the frame of the PixFEL Project funded by the Istituto Nazionale di Fisica Nucleare (INFN), Italy.

Design and TCAD simulations of planar active-edge pixel sensors for future XFEL applications

We report on the design and TCAD simulations of planar active-edge pixel sensors within the INFN PixFEL project. These devices are intended as one of the building blocks for the assembly of a multilayer, four-side buttable tile for X-ray imaging applications in future Free Electron Laser facilities. The requirements in terms of very wide dynamic range and tolerance to extremely high ionizing radiation doses call for high operation voltages. A comprehensive TCAD simulation study is presented, aimed at the best trade-offs between the minimization of the edge region size and the sensor breakdown voltage.

Interleaved SAR ADC for in-pixel conversion in future X-ray FEL application

This work presents the design of an interleaved Successive Approximation Register (SAR) ADC, part of the readout channel for the PixFEL detector. The PixFEL project aims at substantially advancing the state-of-the-art in the field of 2D X-ray imaging for application at the next generation free electron laser (FEL) facilities, through the adoption of cutting-edge microelectronic technologies and innovative design and architectural solutions. For this purpose, the collaboration is developing the fundamental microelectronic building blocks for the readout channel (low noise analog front-end with dynamic compression feature, high resolution and low power ADC, high density memories). This work focuses on the design of the ADC: to obtain a good tradeoff between power, conversion speed and area occupation, an interleaved SAR ADC architecture was adopted. The design is being carried out in a 65 nm CMOS technology. After schematic simulation at the maximum sample rate of 5 MHz, a maximum DNL = 0.125 LSB and a maximum INL = 0.138 LSB were obtained. None of them was found to exceed 0.5 LSB after post layout simulations. The SNR is 56.64 dB, which implies an ENOB = 9.6. The power consumption is 85 μW. Different test structures have been designed, with an area going from 0.00563 mm2 to 0.0072 mm2.

PixFEL: Enabling technologies, building blocks and architectures for advanced X-ray pixel cameras at the next generation FELs

The PixFEL project is conceived as the first stage of a long term research program aiming at the development of advanced instrumentation for coherent X-ray diffractive imaging applications at the next generation free electron laser (FEL) facilities. The project aims at substantially advancing the state-of-the-art in the field of 2D X-ray imaging through the adoption of cutting-edge microelectronic technologies and innovative design and architectural solutions. For this purpose, the collaboration is developing the fundamental microelectronic building blocks (low noise analog front-end with dynamic compression feature, high resolution, low power ADC, high density memories) and investigating and implementing the enabling technologies (active edge pixel sensors, high density and low density through silicon vias) for the assembly of a multilayer four side buttable tile. The building block design is being carried out in a 65 nm CMOS technology. The ambitious goal of the research program is the fabrication of an X-ray camera with single photon resolution, 1 to 104 photons @ 1 keV to 10 keV input dynamic range, 1 kevent in-pixel memory, 100 μm pixel pitch, and the capability to be operated at the fast (1 MHz or larger) rates foreseen for the future X-ray FEL machines.

PixFEL: development of an X-ray diffraction imager for future FEL applications

A readout chip for diffraction imaging applications at new generation X-ray FELs (Free Electron Lasers) has been designed in a 65~nm CMOS technology. It consists of a

A pixelated x-ray detector for diffraction imaging at next-generation high-rate FEL sources

32 \times 32

Geiger-mode avalanche pixels in 180 nm HV CMOS process for a dual-layer particle detector

matrix, with square pixels and a pixel pitch of

A time interleaved, 10 bit SAR ADC with split capacitor DAC for diffraction imaging at X-ray FELs

110\ \mu m

PFM2: A 32 × 32 readout chip for the PixFEL X-ray imager demonstrator

. Each cell includes a low-noise charge sensitive amplifier (CSA) with dynamic signal compression, covering an input dynamic range from 1 to