Leonard Rockett

Radiation Hardened FPGA Technology for Space Applications

High performance, high density, radiation hardened Field Programmable Gate Arrays (FPGAs) are in great demand for military and space applications to reduce design cost and cycle time. BAE Systems has implemented radiation hardened 150nm bulk CMOS process technology in its foundry located in Manassas, VA to support such advanced product needs. BAE Systems and Actel Corporation are collaborating to bring the next-generation radiation hardened FPGA product for space applications to market. This paper will describe the rad hard AX-250 FPGA and the electrical and radiation test data on rad hard 150nm product hardware, FPGA device structures and anti-fuse arrays, as part of the overall FPGA product installation and qualification effort.

A 4-Mb Non-volatile Chalcogenide Random Access Memory designed for space applications: Project status update

BAE Systems, under contract to the US Air Force Research Labs, has been developing a 4Mb Non-Volatile Chalcogenide Random Access Memory (C-RAM¿) optimized for the radiation environments encountered in spacecraft applications. C-RAM is a phase change memory with a unique combination of features that collectively provide a high-density, low-power, non-volatile memory solution that is radiation hardened and meets rigorous reliability requirements. The device is now undergoing QML qualification in preparation for being flight production ready in early 2009. Flight qualified C- RAM will serve the critical need for rad hard non-volatile RAM in strategic space and military applications. Initial space radiation effects testing (heavy ion induced upset rates) demonstrate the robust nature of the device. No memory cell upsets were recorded and the majority of the observed upsets were soft errors (SE) induced in the sense amp circuits which are easily correctable with common error correcting code (ECC) algorithms. During the product development phase potential failure mechanisms associated with phase change memories such as proximity disturbs and drill-in effects were evaluated to determine whether they were legitimate concerns for C-RAM. These tests and other tests involving second order radiation effects, such as the effect of heavy ion radiation exposure on data retention lifetime were conducted. The results of these investigations further demonstrate the full capacity of the product technology. This paper will describe the C-RAM design and operation, and the results of the test and characterization of C-RAM devices.

A radiation hardened reconfigurable FPGA

A new high density, high performance radiation hardened, reconfigurable Field Programmable Gate Array (FPGA) is being developed by Achronix Semiconductor and BAE Systems for use in space and other radiation hardened applications. The reconfigurable FPGA fabric architecture utilizes Achronix Semiconductor novel picoPIPE technology and it is being manufactured at BAE Systems using their strategically radiation hardened 150 nm epitaxial bulk CMOS technology, called RH15. Circuits built in RH15 consistently demonstrate megarad total dose hardness and the picoPIPE asynchronous technology has been adapted for use in space with a Redundancy Voting Circuit (RVC) methodology to protect the user circuits from single event effects.

Designing CMOS data cells for space systems

Abstract The increasing miniaturization of advanced microelectronics drives the magnitude of charge representing information within a circuit to increasingly smaller levels, raising the susceptibility of its corruption by spurious signals. Noise spikes caused by the stochastic collision of energetic single particles with charge-sensitive regions at the semiconductor surface can destroy stored information, leading to logic errors. Error-producing single particles for highly advanced microcircuits are omnipresent, emanating from a variety of sources, from an alpha particle emitted from the metal layers forming the interconnect grid on the circuit to galactic high energy heavy ions encountered by the microelectronics within satellite systems. No matter the source of the ions, the resulting excess charge collection dynamics that may lead to logic errors are in all cases essentially the same. That is, if the interaction of an ion with the semiconductor substrate occurs in close proximity to the data node of a latch circuit, the resultant excess ionization charge collected at the data node may cause the latch to erroneously change state, a single-event upset (SEU). The information now contaminated by this invalid data state is in some cases unrecoverable. Consequently, a considerable amount of effort is spent during the circuit library design and development phases to minimize the probability of occurrence of SEUs. Complementary metal oxide semiconductor (CMOS) technologies are predominantly used to build the most advanced high-performance, low-power digital systems and quite a number of SEU hardening design techniques have been developed to mitigate the threat of logic upset due to energetic particles. This paper will describe in much greater detail the threat posed to the information stored in CMOS data latches by energetic ion strikes. Some of the most commonly used design-hardening approaches will be examined and the relative merits of each approach will be explored.

High performance radiation hardened static random access memory (SRAM) design for space applications

Static random access memory (SRAM) product for advanced space applications must demonstrate high performance to meet the ever increasing data rates of space systems and must be radiation hardened to ensure unfettered, reliable operation in the harsh environments of outer space. High performance and radiation hardness are not mutually exclusive. The challenge confronting present day SRAM development is to concurrently achieve both of these objectives. An SRAM design evaluation methodology is described that uncovers limitations on performance, facilitating the identification of both the limiting mechanisms and the corrective design enhancements. Simulation model to hardware measurement correlation on two designs of radiation tolerant 4 M SRAM product validates the evaluation methodology. The evaluation methodology described herein can be Universally applied to any SRAM design to ensure that the highest performance potential of the design is realized.

Characterization and qualification of radiation hardened nonvolatile phase change memory technology

BAE Systems has developed a 4Mb Non-Volatile Chalcogenide Random Access Memory (C-RAM) optimized for the radiation environments encountered in spacecraft applications. C-RAM is a phase change memory with a unique combination of features that collectively provide a high-density, low-power, non-volatile memory solution that is radiation hardened and meets rigorous reliability requirements. The device has completed QML-Q qualification testing and is now in full production. Flight qualified C-RAM will serve the critical need for rad hard nonvolatile RAM in strategic space and military applications. This paper describes the 4Mb C-RAM product and presents the results of C-RAM QML-Q qualification testing including detailed analyses of the test results in all the radiation environments. 1 2

Radiation Hardened 150nm Standard Cell ASIC Design Library for Space Applications

High performance, low-power, radiation hardened application specific integrated circuits (ASICs) are essential building blocks for advanced systems used in strategic space applications. BAE Systems in Manassas, VA has developed and demonstrated a comprehensive radiation hardened 150 nm standard cell digital ASIC design library. The library is used to configure ASIC designs built using the strategically radiation hardened fully-scaled 150 nm bulk CMOS process technology at the recently modernized foundry at BAE systems. This paper describes the radiation hardened standard cell ASIC design library, the characteristics of the underlying rad hard 150 nm CMOS process technology, and the ASIC product design flow.

Design Considerations for Next Generation Radiation Hardened SRAMs for Space Applications

There is an ever-present focus on increasing the functional density of components used in space electronics, that is, putting more functional capacity in smaller, lighter packages. Packages with small footprints use less board area, potentially reducing system mass. High-density devices may reduce the total required chip count, further eliminating mass and improving system reliability. Low power devices do not overburden the power budget. All of these factors potentially lower the weight of the satellite reducing launch cost and lowering overall operational costs. Increasing the bit density of SRAMs used in space electronics to better realize these positive outcomes presents significant new challenges with respect to radiation hardening of these high-performance, high-density components. BAE systems is designing the next generation of radiation hardened SRAMs. This paper describes the design considerations for advanced radiation hardened SRAMs

Structured ASIC Design for Space Systems Applications

As integrated circuit dimensions scale downward the costs of the photolithographic masks used to manufacture microcircuits are becoming prohibitively high. And in todays highly competitive business environment, time to market is increasingly critical. Custom standard-cell ASICs are on the wrong side of these dynamics with their long lead times and the need to build a full mask set per part number. Structured ASICs offer an attractive alternative. Structured ASICs are developed from an inventoried base masterslice chip design by using generally only a few back-end masking levels to personalize the resulting ASIC function, saving mask costs and shortening lead times per circuit design. Structured ASICs strategically fill the trade space between FPGAs and custom ASICs. BAE Systems has developed a radiation hardened structured ASIC product offering for next-generation advanced military and space applications