Li-Wei Feng

A study of resistive switching effects on a thin FeOx transition layer produced at the oxide/iron interface of TiN/SiO2/Fe-contented electrode structures

Large (>102) and stable resistance switching characteristics were demonstrated in TiN/SiO2/Fe structure due to the presence of a thin FeOx transition layer at the SiO2/Fe interface, produced spontaneously during the plasma-enhanced tetraethyl orthosilicate oxide deposition process. Addition of Pt into Fe electrode, i.e., a TiN/SiO2/Fe0.73Pt0.27 structure, was observed to improve the data dispersion of switching parameters, associating with the decrease in Fe content inside the FeOx layer. Additionally, current-voltage fitting data shows that current transport mechanism is governed by Ohm’s law in low voltage region and Pool–Frenkel behavior in high voltage region, consisting with FeOx phase transition characteristics.

Improvement of resistance switching characteristics in a thin FeOx transition layer of TiN/SiO2/FeOx/FePt structure by rapid annealing

In this paper, the influence of a 600 °C rapid thermal annealing for 60 s on the improvements of resistance switching behaviors in a TiN/SiO2/FeOx/FePt structure is reported. It is found that besides the distinct reduction in memory switching parameters in forming voltage, set/reset voltages, and their dispersions, the resistance ratio of high-resistance state to low-resistance state is also enlarged after annealing. The effects of annealing on improving the resistance switching properties are discussed by x-ray diffraction and x-ray photon-emission spectra depth profile results. Additionally, good retention characteristics are exhibited in the annealed TiN/SiO2/FeOx/FePt resistance switching memory.

Role of germanium in the reduced temperature dependence of Ti-based nanocrystals formation for nonvolatile memory applications

We investigated the physical and electrical characteristics of Ti-based nanocrystals (NCs) with composition of germanium fabricated by cosputtering titanium silicide and germanium targets for low temperature applications of nonvolatile memory. The addition of Ge significantly reduces the thermal budget necessary for Ti-based NCs formation to 500 °C in 2 min due to the rise of its morphological instability and agglomeration properties. Compositions characteristics were analyzed by x-ray photon-emission spectroscopy and formations of NCs were observed by transmission electron microscopy. Additionally, capacitance-voltage characteristics, data retention, and endurance properties are characterized to demonstrate its advantages for nonvolatile memory device applications.

Pi-shape gate polycrystalline silicon thin-film transistor for nonvolatile memory applications

In this work, we studied a pi-shape gate polycrystalline silicon thin-film transistor poly-Si TFT with silicon-oxide-nitride-oxide-silicon SONOS layers and nanowire channels for the application of electric driver and nonvolatile memory. The proposed pi-gate TFT-SONOS has superior transfer characteristics and its output characteristic also exhibits the high driving current and the suppression of the kink effect. For memory application, the device can provide high program/erase efficiency and large threshold voltage shift under adequate bias operation. The enhanced performance for the pi-gate TFT-SONOS is attributed to the larger effective channel width and the number of channel corners.

Nonvolatile Si∕SiO2∕SiN∕SiO2∕Si type polycrystalline silicon thin-film-transistor memory with nanowire channels for improvement of erasing characteristics

A silicon-oxide-nitride-oxide-silicon type polycrystalline silicon thin-film transistor (poly-Si TFT) with nanowire channels was investigated for both transistor and memory applications. The poly-Si TFT memory device has superior electrical characteristics, such as higher drain current, smaller threshold voltage, and steeper subthreshold slope. Also, the simulation result on electrical field reveals that the electrical field across the tunnel oxide is enhanced and that across the blocking oxide is reduced at the corner regions. This will lead to the parasitic gate injection activity and the erasing speed can be apparently improved in the memory device due to the pronounced corner effect and narrow channel width.

Improved Performance of F-Ions-Implanted Poly-Si Thin-Film Transistors Using Solid Phase Crystallization and Excimer Laser Crystallization

Polycrystalline silicon thin-film transistors (Poly-Si TFTs) with F-ions-implantation were investigated in this study. The electrical characteristics and reliability of the F-ions-implanted poly-Si TFTs were reported for solid phase crystallization (SPC) and excimer laser crystallization (ELC) methods respectively. The thermal annealing causes F-ions to pile up at the poly-Si interface, without the initial pad oxide deposition. With the introduction of fluorine in poly-Si film, the trap state density was effectively reduced. Also, the presence of strong Si-F bonds enhances electrical endurance against hot carrier impact by using F-ions-implantation. These improvements in electrical characteristics are even obvious for the ELC poly-Si TFTs compared to the SPC ones

Tunable resistance switching characteristics in a thin FeO x - transition layer part II: Sweeping voltage controlling

Multilevel resistance switching characteristics of the thin FeOx-transition layer were studies by controlling the maximum stopped voltage during reset process. It is obtained that the HRS is mainly influenced by the stopped voltage value, which is nearly independent to the LRS. Moreover, statistics of set and reset electrical parameters show that the possible switching process is localized, and also, the multiple resistive switching states in the TiN/SiO2/FeOx/Fe memristor could be approved.

Tunable resistance switching characteristics in a thin FeO x -transition layer part I: Compliance current controlling

Multilevel resistance switching characteristics of the thin FeOx-transition layer were studies by controlling the maximum current compliance during set process. It is obtained that the LRS is mainly influenced by the compliance current value, which is nearly independent to the HRS. Moreover, statistics of set and reset electrical parameters show that the possible switching process is localized, and also, the multiple resistive switching states in the TiN/SiO2/FeOx/Fe memristor could be approved.

Reliability study on tri-gate nanowires poly-Si TFTs under DC and AC hot-carrier stress

This work studies reliability after dc and ac hot-carrier stress of polysilicon thin-film transistors (poly-Si TFTs) with single-channel and ten-nanowire channels, respectively. For single-channel (S1) poly-Si TFT, the device characteristics degradation under ac hot-carrier stress is severer than dc stress. In addition, the Vth and SS variation increases with the frequency increasing from 1 K Hz to 1 MHz. On the contrary, for tennanowire channels (M10) tri-gate poly-Si TFT, the Vth and SS variation is much lower than the S1 TFT with different stressing frequency. These results indicate that the M10 TFT has less deep state generation after dc and ac stress. Because the M10 TFT has more effective NH3 plasma passivation than that of S1 TFT due to the ten split nanowire channels has wide NH3 plasma passivation area. Moreover, M10 TFT has robust tri-gate control can reduce the lateral electrical field and its penetration from the drain to reduce hot-carrier effect. In ac stress study, the device degradation is dependent on the pulse falling time rather than rising time. In temperature study, the device degradation is improved as the operation temperature increasing from 25degC to 75degC.

Degradation Behaviors of Trigate Nanowires Poly-Si TFTs with NH3 Plasma Passivation under Hot-Carrier Stress

This work studies degradation behavior after hot-carrier stress of trigate polysilicon thin-film transistors (poly-Si TFTs) with nanowires. The NH 3 plasma passivation effect is also studied on the electrical characteristics after hot-carrier stress. The reliability of poly-Si TFTs with NH 3 plasma passivation outperforms that without such passivation, resulting from the effective hydrogen passivation of the grain-boundary dangling bonds, and the pileup of nitrogen at the SiO 2 /poly-Si interface. The reliability of poly-Si TFTs further improves by using nanowires structure. These findings originate from the fact that the nanowires poly-Si TFT has robust trigate control to reduce the hot-carrier effect due to declining lateral electrical field and its penetration from the drain, and its split nanowire structure has superior NH 3 plasma passivation effect. In degradation results under dc and ac stress, it reveals that the NH 3 plasma is mostly passivated on deep traps of grain boundaries rather than tail traps.