Lorraine Rispal

Large-Scale In Situ Fabrication of Voltage-Programmable Dual-Layer High-

In this letter, we report on measurements of carbon nanotube (CNT) field-effect transistors with high on/off ratio to be used as nonvolatile memory cells operating at room temperature. Thousands of memory devices have been realized using a complete in situ fabrication method. The self-aligned fabrication process allows large-scale production of CNT memory devices with high yield. The memory function is obtained by the threshold voltage shift due to the highly reproducible hysteresis in the transfer characteristics. The ratio of the current levels between a logical ldquo1rdquo and a ldquo0rdquo is about 106.

\kappa

Hysteresis in carbon nanotube field-effect transistors (CNTFETs) is an important issue that should be solved in the face of an integration in the complementary metal oxide semiconductor (CMOS) technology. One possible way is the passivation of the devices with poly(methyl methacrylate) (PMMA). In this work, PMMA-passivated CNTFETs are produced with a novel self-aligned fabrication process. The nanotubes are grown in-situ by chemical vapor deposition over the wafer surface so that no complex manipulations are required. The unique step of lithography avoids misalignment. With this suitable fabrication process, more than 6000 passivated transistors have recently been fabricated very easily in our institute. The devices are working like p-type MOSFET with on/off ratios of up to several 106, are fully functional even at ultralow supply voltages (e.g., 400 mV drain voltage, -3 to 3 V gate voltages) and show reduced hysteresis effects (e.g., 580 mV at Ids of 10-8 A).

Dielectric Carbon Nanotube Memory Devices With High On/Off Ratio

In this work, fully functional carbon nanotube field-effect transistors (CNT-FETs) have been fabricated using a simple and inexpensive process including in-situ chemical vapor deposition (CVD) growth of the nanotubes. The temperature used is 900 °C and the catalyst layer is nickel on aluminum. Simultaneously, the catalyst metal areas are used as source/drain electrodes. The CNT-FET fabrication is compatible with conventional complementary metal oxide semiconductor (CMOS) technology. For process optimization, every major process step is controlled by atomic force microscopy (AFM). The nondestructive AFM technique provides both a complete overview of the structures as well as the detailed geometrical properties of the nanotubes. We have also fabricated CNT-FET test structures in which the source/drain electrodes have a direct conductive path to the substrate, in order to perform electrical measurements at the nanoscale by conductive AFM (C-AFM). In this way, we obtain current images of the structures and the electrical characteristics of each individual nanotube can be measured.

Polymethyl Methacrylate Passivation of Carbon Nanotube Field-Effect Transistors: Novel Self-Aligned Process and Effect on Device Transfer Characteristic Hysteresis

In the future of nanoelectronics, the exclusive use of silicon-based devices will be very unlikely since the scaling limits of silicon will be reached soon. Carbon seems to be a superb alternative to build high-performance electronic devices. Carbon nanotube field-effect transistors can be used as active devices in integrated circuits, as memory cells or as sensors in numerous applications. More recently, graphenebased transistors are emerging as another potential candidate to replace traditional MOSFETs. This contribution will give a brief overview on recent developments in carbon-based nanoelectronics.

Carbon Nanotube Transistor Fabrication Assisted by Topographical and Conductive Atomic Force Microscopy

In this paper we propose a novel method for the realization of carbon nanotube field-effect sensors (CNTFESs) which will most likely have a strong impact on the next-generation of sensors. CNTFESs are ideally suitable for biomedical sensor applications due to their excellent inherent properties such as ultra small size, high specific surface area and extremely high sensitivity. CNTFESs are based on carbon nanotube field-effect transistors (CNTFETs) which are optimized for sensor applications. We have succeeded to develop a simple, reproducible fabrication process to grow individual single-walled carbon nanotubes (SWNTs) and SWNT-networks directly within the specified device area. No tedious manual manipulation and alignment of the SWNTs is necessary. Electrical results of the fabricated fully functional CNTFETs are presented and the use of these devices as SWNT-based field-effect controlled sensors for virus detection is discussed.

Carbon: The future of nanoelectronics

In the future of nanoelectronics, the use of pure silicon based devices will not be possible anymore since the limit of silicon are already reached. Carbon seems to be a great alternative to build high performance electronic devices. Carbon nanotube field-effect transistors can be used as active device in integrated circuits, as memory cell in numerous applications. More recently, graphene-based transistors are emerging as another potential candidate to extend and eventually replace the traditional planar MOSFET.

Fabrication of Ultra-Sensitive Carbon Nanotube Field-Effect Sensors (CNTFES) for Biomedical Applications

In this paper we investigate the feasibility of carbon nanotubes (CNTs) for power applications. On the basis of a process which fabricates thousands of carbon nanotube field-effect transistors (CNTFETs) by means of catalytic chemical vapor deposition (CCVD) we will show that CNTFETs are capable to provide a sufficiently high current to drive a light-emitting diode (LED).

Nanoelectronics: From silicon to graphene

In this work, we report on the fabrication of carbon nanotube field-effect transistors (CNTFETs) using a low-cost process based on chemical vapor deposition (CVD) growth of carbon nanotubes (CNTs). The CNT growth occurs on the whole wafer surface and is assisted by a sacrificial Ni/Al catalyst. The process contains neither complicated manipulations of the SWNTs nor multi-step lithography, avoiding the risk of misalignment. Each step of the fabrication is compatible with the traditional CMOS technology. The fabricated structures are unipolar CNTFETs working like P-MOSFETs with on/off ratios up to 3 times 106. We also report on the use of atomic force microscopy and its conductive extension to monitor the process and to provide structural and electrical information at the nanoscale.